Abstract
We introduce the use of timing channels for digital watermarking of embedded hardware and software components. In addition to previous side channel watermarking schemes, timing analysis offers new perspectives for a remote verification of mobile and embedded products. Timing channels make it possible to detect the presence of a watermark solely by measuring program execution times.
We propose schemes for embedding authorship and fingerprint marks that are built upon conditional timing delays. We provide experimental evidence by protecting an implementation of an image binarization circuit on an FPGA board that is connected over Ethernet to a remote PC. The circuit constantly leaks the watermark over the timing channel by modulating its execution time, which is successfully detected by using an oscilloscope and an EM probe, as well as by using software on a remote PC. Our solution for a remote verification is of special interest for highly performant services as they force an adaptive adversary towards enhanced costs in time, memory, and circuitry when bypassing these schemes.
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Notes
- 1.
The two peaks in absence of delay in Fig. 7(a) arise from the combination of operating system and the kernel. The peaks can be observed even when the board is directly connected to the PC. However, when using a different operating system, e.g., Ubuntu with a more recent kernel, only one peak emerges in absence of delay.
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Acknowledgement
This work has been supported in parts by the German Federal Ministry of Education and Research (BMBF) through the project DePlagEmSoft, FKZÂ 03FH015I3.
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Donda, AT., Samarin, P., Samotyja, J., Lemke-Rust, K., Paar, C. (2015). Remote IP Protection Using Timing Channels. In: Lee, J., Kim, J. (eds) Information Security and Cryptology - ICISC 2014. ICISC 2014. Lecture Notes in Computer Science(), vol 8949. Springer, Cham. https://doi.org/10.1007/978-3-319-15943-0_14
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