Abstract
Computational finance is an area that includes many algorithms in trading and analytics that are both computationally very complex and performance critical. As financial institutions intend to perform a steadily increasing number of computations and obtain the results as quickly as possible, computer systems are expected to satisfy these growing performance demands. However, recent years have brought the end of “free” processors speed-ups, and single-thread performance is no longer the driving force behind automatic performance gains enjoyed by the industry for many decades. Nowadays, high-performance computing systems have to increasingly rely on parallel programming models where the original application has to be modified to exploit many parallel cores. This requires considerable redesign efforts and yet, the desired performance improvements are not guaranteed. Some financial applications may also reach practical physical limits imposed by the space and power provisions available in the data centre. A solution to the above problems can be the use of custom accelerators implemented in reconfigurable hardware. Reconfigurable implementations can deliver both high computational throughput and low compute latency in addition to superior energy efficiency. However, porting applications for such devices requires a special skill set in hardware design, complicating their practical adoption. Maxeler Technologies offers conveniently programmable, high-performance computing systems and a software toolchain that exploit the sheer computational power of reconfigurable devices while abstracting the programming into a high-level data-flow model. Our vision is to empower domain experts with the necessary means to create highly customised, efficient hardware/software implementations for their specific applications. This approach enables vertical optimisations across the different layers of abstraction that are typically not exposed to an application designer. The final result is a productive application development process that often delivers speed-ups by orders of magnitudes over traditional CPU implementations.
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Notes
- 1.
Maxeler provides extensions to the Java language, referred to as MaxJ.
References
Arram, J., Luk, W., Jiang, P.: Ramethy: reconfigurable acceleration of bisulfite sequence alignment. In: Proceedings of the International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, pp. 250–259. ACM (2015)
Chau, T.C.P., Niu, X., Eele, A., Maciejowski, J., Cheung, P.Y.K., Luk, W.: Mapping adaptive particle filters to heterogeneous reconfigurable systems. ACM Trans. Reconfigurable Technol. Syst. 7(4), 36:1–36:17 (2014)
Dennis, J.B.: Data flow supercomputers. Computer 13(11), 48–56 (1980)
Fu, H., Gan, L., Clapp, R.G., Ruan, H., Pell, O., Mencer, O., Flynn, M.J., Huang, X., Yang, G.: Scaling reverse time migration performance through reconfigurable dataflow engines. IEEE Micro 34(1), 30–40 (2014)
Gan, L., Fu, H., Yang, C., Luk, W., Xue, W., Mencer, O., Huang, X., Yang, G.: A highly-efficient and green data flow engine for solving euler atmospheric equations. In: 24th International Conference on Field Programmable Logic and Applications (FPL), Munich, 2–4 Sept 2014, pp. 1–6. IEEE (2014)
Godfrey, M., Hendry, D.: The computer as von Neumann planned it. IEEE Ann. Hist. Comput. 15(1), 11–21 (1993)
Jin, Q., Dong, D., Tse, A.H.T., Chow, G.C.T., Thomas, D.B., Luk, W., Weston, S.: Multi-level customisation framework for curve based Monte Carlo financial simulations. In: Reconfigurable Computing: Architectures, Tools and Applications – 8th International Symposium (ARC), Hong Kong, pp. 187–201. Springer (2012)
Kung, H.T.: Why systolic architectures? Computer 15(1), 37–46 (1982)
Lindtjorn, O., Clapp, R., Pell, O., Fu, H., Flynn, M., Mencer, O.: Beyond traditional microprocessors for geoscience high-performance computing applications. IEEE Micro 31(2), 41–49 (2011)
Pell, O., Bower, J., Dimond, R., Mencer, O., Flynn, M.J.: Finite-difference wave propagation modeling on special-purpose dataflow machines. IEEE Trans. Parallel Distrib. Syst. 24(5), 906–915 (2013)
Pell, O., Mencer, O.: Surviving the end of frequency scaling with reconfigurable dataflow computing. SIGARCH Comput. Archit. News 39(4), 60–65 (2011)
Thomas, D.B., Luk, W.: Multiplierless algorithm for multivariate gaussian random number generation in FPGAs. IEEE Trans. VLSI Syst. 21(12), 2193–2205 (2013)
Weston, S., Spooner, J., Racaniére, S., Mencer, O.: Rapid computation of value and risk for derivatives portfolios. Concurr. Comput. Pract. Exp. 24(8), 880–894 (2012)
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Becker, T., Mencer, O., Weston, S., Gaydadjiev, G. (2015). Maxeler Data-Flow in Computational Finance. In: De Schryver, C. (eds) FPGA Based Accelerators for Financial Applications. Springer, Cham. https://doi.org/10.1007/978-3-319-15407-7_11
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DOI: https://doi.org/10.1007/978-3-319-15407-7_11
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