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Abstract

Since the development of the first computer, the data storage has been a major procedure and the storage units are an intricate component of any computational machine. Data storage mainly includes the storage of the software program, the storage of data that are processed in real-time as well as the storage of information that can be recalled from the computational machine at any time or processed by another machine in a different place. For simplicity we call all these units used for software or data storage as memories. During the early years of the computer age, memories were made of many tiny magnetic cores and were as big as typical rooms in a house to store very short software programs or a few data. Magnetism was a well-known phenomenon and magnetic materials were some of the first materials having the hysteresis or the alternation between two different states depending on the magnetization direction, i.e., magnetic field up or down that is necessary for Boolean-logic devices.

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Notes

  1. 1.

    For years Flash and NVM are used as synonyms.

References

  • Baik SJ, Choi I, Chung U-I, Moon JT (2004) Engineering on tunnel barrier and dot surface in Si nanocrystal memories. Solid State Electron 48:1461–1690

    Article  Google Scholar 

  • Bez R, Camerlenghi E, Modelli A, Visconti A (2003) Introduction to flash memory. Proc IEEE 91(4):489–502

    Article  Google Scholar 

  • Brewer JE, Gill M (2008) Nonvolatile memory technologies with emphasis on Flash. Wiley, New York, NY

    Google Scholar 

  • Bukowski T, Simmons JH (2002) Quantum dot research: current state and future prospects. Crit Rev Solid State Mater Sci 27:119–142

    Article  Google Scholar 

  • Burghartz JN (ed) (2013) Guide to state-of-the-art electron devices. Wiley, New York, NY

    Google Scholar 

  • Burr GW, Kurdi BN, Scott JC, Lam CH, Gopalakrishnan K, Shenoy RS (2008) Overview of candidate device technologies for storage-class memory. IBM J Res Dev 52:449–464

    Article  Google Scholar 

  • Cappelletti P, Bez R, Cantarelli D, Fratin L (1994) Failure mechanisms of flash cell in program/erase cycling. Electron devices meeting, 1994 IEDM ‘94. Technical digest. IEEE, San Francisco, CA, pp 291–294

    Google Scholar 

  • Cartier DD (1995) J Appl Phys 78:3883

    Article  Google Scholar 

  • Changa T-C, Jiana F-Y, Chenc S-C, Tsaib Y-T (2011) Developments in nanocrystal memory. Mater Today 14:608–615

    Article  Google Scholar 

  • Clementi C, Bez R (2005) Non volatile memory technologies: floating gate concept evolution. In: Claverie A et al (eds) Materials research society symposium proceedings, vol 830. MRS, Warrendale, PA, p D1.2

    Google Scholar 

  • Crippa L, Micheloni R, Motta I, Sangalli M (2008) Nonvolatile Memories: NOR vs. NAND architectures. In: Micheloni GCR (ed) Memories in wireless systems. Springer, Berlin, pp 29–53

    Chapter  Google Scholar 

  • Deleruyelle D, Micolaub G (2008) On the electrostatic behavior of floating nanoconductors. Solid State Electron 52:17–24

    Article  Google Scholar 

  • Depas M, Vermeire B, Mertens P, Van Meirhaeghe R, Heyns M (1995) Determination of tunnelling parameters in ultra-thin oxide layer poly-Si/SiO2/Si structures. Solid State Electron 38:1465–1471

    Article  Google Scholar 

  • Design SM (2014) Experts at the table: commercial potential and production challenges for 3D NAND memory technology. http://semimd.com/blog/2014/02/06/experts-at-the-table-commercial-potential-and-production-challenges-for-3d-nand-memory-technology/

  • Dimitrakis P, Normand P (2008) Silicon nanocrystal memories. In: Khriachtchev L (ed) Silicon nanophotonics. Pan Stanford Publishing, Singapore, pp 211–241

    Google Scholar 

  • Dimitrakis P, Kapetanakis E et al (2003) MOS memory structures by very-low-energy-implanted Si in thin SiO2. Mater Sci Eng B 101:14–18

    Article  Google Scholar 

  • Dimitrakis P, Normand P, Ioannou-Sougleridis V, Bonafos C, Schamm-Chardon S, Benassayag G et al (2013a) Quantum dots for memory applications. Phys Status Solidi A 210:1490–1504

    Article  Google Scholar 

  • Dimitrakis P, Schamm-Chardon S, Bonafos C, Normand P (2013b) Nanoparticle-based memories: concept and operation principles. In: Chaughule S, Watawe SC (eds) Applications of nanoparticles. American Scientific Publishers, Valencia, CA, pp 17–43

    Google Scholar 

  • Dorf RC (1993) The electrical engineering handbook. CRC PRESS, Boca Raton, FL

    Google Scholar 

  • Dunn C, Hefley P et al (1993) Process reliability development for nonvolatile memories. In: Proceedings of the 31st annual interantional reliability physics symposium. IEEE, Atlanta, GA, pp 133–146

    Google Scholar 

  • EMC (2014) Business and the digital universe. http://www.emc.com/infographics/digital-universe-business-infographic.htm?cmp=micro-big_data-general-emc. Accessed 6 Aug 2014

  • Fazio A (2004) Flash memory scaling. MRS Bull 29:814

    Article  Google Scholar 

  • Freitas RF, Wilcke WW (2008) Storage-class memory: the next storage system technology. IBM J Res Dev 52:439–447

    Article  Google Scholar 

  • Frohman-Bentchkowsky D (1970) The metal-nitride-oxide-silicon (MNOS)-transistor—characteristics and applications. Proc IEEE 58:1207

    Article  Google Scholar 

  • Fujita S, Yasuda S et al (2003) Two-terminal Si-nanocrystal memory formed between the two metal layers IEEE-NANO 2003. IEEE, New York, NY, pp 760–762

    Google Scholar 

  • Govoreanu B, Brunco DP et al (2005) Scaling down the interpoly dielectric for next generation flash memory: challenges and opportunities. Solid State Electron 49:1841–1848

    Article  Google Scholar 

  • Habrakena FHPM, Kuiper AET (1994) Silicon nitride and oxynitride films. Mater Sci Eng R Rep 12:123–175

    Article  Google Scholar 

  • Harrison P (2005) Quantum wells, wires and dots, 2nd edn. Wiley, New York, NY

    Book  Google Scholar 

  • IEEE (1999) IEEE standard definitions and characterization of floating gate semiconductor arrays. IEEE, New York, NY

    Google Scholar 

  • ISSCC (2014) ISSCC 2014 trends

    Google Scholar 

  • ITRS (2013) International technology roadmap of semiconductors (Vol. emerging research devices). SIA. ITRS, New York, NY

    Google Scholar 

  • James D (2014) The second shoe drops – Samsung V-NAND Flash. http://www.chipworks.com/en/technical-competitive-analysis/resources/blog/samsung-v-nand-flash/. Accessed 6 Aug 2014

  • Kim K et al (2006) Future outlook of NAND flash technology for 40 nm node and beyond. In: Proceedings of the IEEE non-volatile semiconductor memory workshop. IEEE, Monterey, pp 9–11

    Google Scholar 

  • King Y-C, King T-J, Hu C (1998) MOS memory using germanium nanocrystals formed by thermal oxidation of Si1-xGex. In: International electron devices meeting – IEDM, pp 115–118

    Google Scholar 

  • Koh BH, Kan EWH et al (2005) Traps in germanium nanocrystal memory and effect on charge retention: modeling and experimental measurements. J Appl Phys 97:124305

    Article  Google Scholar 

  • Lai SK (2008) Flash memories: successes and challenges. IBM J Res Dev 52(4/5):529–535

    Article  Google Scholar 

  • Lai S-C, Lue H-T, Yang M-J, Hsieh J-Y, Wang S-Y, Wu T-B et al (2007) MA BE-SONOS: a bandgap engineered SONOS using metal gate and Al2O3 blocking layer to overcome erase saturation. In: IEEE non-volatile semiconductor memory workshop, pp 88–89

    Google Scholar 

  • Lee JD, Choi J-H et al (2003a) Data retention characteristics of Sub-100 nm NAND Flash memory cells. IEEE Electron Device Lett 24(12):748

    Article  Google Scholar 

  • Lee JD, Choi JH, Park D, Kinam (2003) Degradation of tunnel oxide by FN current stress and its effects on data retention characteristics of 90 nm NAND Flash memory. In: Proceedings of the IRPS. IEEE, pp 497–501

    Google Scholar 

  • Lenzlinger M, Snow E (1969) Fowler-Nordheim tunneling into thermally grown SiO2 EDM. Technical digest, vol 40. IEEE, New York, NY, pp 273–283

    Google Scholar 

  • Lin YH, Chien CH (2007) Two-bit lanthanum oxide trapping layer nonvolatile flash memory. J Electrochem Soc 154:H619–H622

    Article  Google Scholar 

  • Lin SH, Chin A et al (2008) Good 150C retention and fast erase characteristics in charge-trap-engineered memory having a scaled Si3N4 layer. In: IEDM technical digest, pp 1–4

    Google Scholar 

  • Liu R (2012) SEMATECH symposium Taiwan, 18 Sept 2012. SEMATECH symposia. http://www.sematech.org/meetings/archives/symposia/10348/pres/Keynote_04_Liu_for%20web%20posting_Final.pdf. Accessed 6 Aug 2014

  • Lue HT, Wang SY, Shih YH (2005) BE-SONOS: a bandgap engineered SONOS with excellent performance and reliability. In: IEDM technical digest electron devices meeting. IEEE, Washington, DC, pp 547–550

    Google Scholar 

  • Maikap et al. (2006) Very low voltage operation of p-Si/Al2O3/HfO2/TiO2/Al2O3/Pt single quantum well flash memory devices with good retention. Proc Int Conf Solid State Devices Mater, pp 582–583

    Google Scholar 

  • Maikap S, Lee HY et al (2007) Charge trapping characteristics of atomic-layer-deposited HfO2 films with Al2O3 as a blocking oxide for high-density non-volatile memory device applications. Semicond Sci Technol 22:884

    Article  Google Scholar 

  • Micheloni GC (2003) Special issue on flash technology. Proc IEEE 91(4):483–488

    Article  Google Scholar 

  • Micheloni R, Crippa L, Marelli A (2010) Inside NAND flash memories. Springer, Heidelberg

    Book  Google Scholar 

  • Modelli A (1999) Reliability of thin dielectrics for nonvolatile applications. Microelectron Eng 48:403–408

    Article  Google Scholar 

  • Ng KK (1995) Complete guide to semiconductor devices, Internationalth edn. McGraw-Hill, New York, NY

    Google Scholar 

  • Roizin Y (2007) Microelectronics: material, science, characterization and application. In: Baklanov MGM (ed) Dielectric films for advanced microelectronics. Wiley, New York, NY

    Google Scholar 

  • Salvo B (2009) Silicon non-volatile memories: paths of innovation. Wiley-ISTE, New York, NY

    Book  Google Scholar 

  • Shen RS et al (2000) Flash memories. In: Chen W-K (ed) The VLSI handbook. CRC Press LLC, Boca Raton, FL

    Google Scholar 

  • Shi Y, Saito K et al (1999) Effects of interface traps on charge retention characteristics in silicon-quantum-dot-based metal-oxide-semiconductor diodes. Jpn J Appl Phys 38:425–428

    Article  Google Scholar 

  • Simeonov SS, Yourukov I (2004) Inter-trap tunnelling in thin SiO2 films. Phys Status Solidi A 45:2966–2979

    Google Scholar 

  • Southwick RA III (2011) An interactive simulation tool for complex multilayer dielectric devices. IEEE Trans Device Mater Reliabil 11:236–243

    Article  Google Scholar 

  • Specht M et al (2004) Sub-40 nm tri-gate charge trapping nonvolatile memory cells for high-density applications. In: Symposium on VLSI technical digest, pp 244–245

    Google Scholar 

  • Sze SM (1981) Physics of semiconductor devices, 2nd edn. Wiley, New York, NY

    Google Scholar 

  • Tam S, Ko P-K, Hu C (1984) Lucky-electron model of channel hot electron injection in MOSFETs. IEEE Trans Electron Devices 31:1116

    Article  Google Scholar 

  • Thin film storage (TFS) with FlexMemory technology. (n.d.) http://www.freescale.com/webapp/sps/site/overview.jsp?code=TM_RD_PROCESSTECH_90NMTFS_FLXMEM&fsrch=1&sr=1&pageNum=1

  • Tiwari S, Rana F, Chan K, Hanafi H, Chan W, Buchanan D (1995) Volatile and non-volatile memories in silicon with nano-crystal storage. In: Technical digest – international electron devices meeting, pp 521–524

    Google Scholar 

  • Tiwari S, Rana F, Hanafi H, Hartstein A, Crabbé E, Chan K (1996) A silicon nanocrystals based memory. Appl Phys Lett 68:1377–1379

    Article  Google Scholar 

  • TOSHIBA (2012) http://www.flash25.toshiba.com. 5 Aug 2014

  • Tsai PH et al (2007) Novel SONOS-type nonvolatile memory device with suitable band offset in HfAlO charge-trapping layer. In: Symposium on VLSI TSA, pp 1–2

    Google Scholar 

  • Tsai CY, Lee TH et al (2010) Highly scaledcharge-trapping layer of ZrON nonvolatile memory device with good retention. Appl Phys Lett 97:213504

    Article  Google Scholar 

  • Tsai CY, Lee TH et al (2011) Arsenic-implanted HfON charge trapping flash memory with large memory window and good retention. IEEE Electron Device Lett 32:381–383

    Article  Google Scholar 

  • Wahl J, Silva H, Gokirmak A, Kumar A, Welser J, Tiwari S (1999) Write, erase and storage times in nanocrystal memories and the role of interface states. Technical digest – international electron devices meeting, pp 375–378

    Google Scholar 

  • Wang L, Gai S (2014) The next generation mass storage devices – physical principles and current status. Contemp Phys 1–19

    Google Scholar 

  • Wegener H, Lincoln A, Pao H, O’Connell M, Oleksiak R, Lawrence H (1967) The variable threshold transistor, a new electrically-alterable, non-destructive read-only storage device IEDM techchnical digest. IEEE, New York, NY, p 70

    Google Scholar 

  • White M (2000) On the go with SONOS. IEEE Circuits Designs 22–31

    Google Scholar 

  • White MH (2006) Advancements in nanoelectronic sonos nonvolatile semiconductor memory (NVSM) devices and technology. Int J Hi Speed Electron Syst 16:479–501

    Article  Google Scholar 

  • Wu JY, Chen YT et al (2010) Ultrathin HfON trapping layer for charge-trap memory made by atomic layer deposition. IEEE Electron Device Lett 31:993–995

    Article  Google Scholar 

  • Yang HJ, Cheng CF et al (2008) Comparison of MONOS memory device integrity when using Hf1-x-yNxOy trapping layers with different N compositions. IEEE Trans Electron Devices 55:1417–1423

    Article  Google Scholar 

  • Yater JA (2013) Implementation of Si nanocrystals in non-volatile memory devices. Phys Status Solidi A 210:1505–1511

    Article  Google Scholar 

  • Zhu C, Z. Xu et al (2012) High performance MAHAHOS memory devices: charge trapping and distribution in bandgap engineered structure. In: 4th IEEE international memory workshop (IMW), pp 1–4

    Google Scholar 

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Correspondence to Panagiotis Dimitrakis Ph.D. .

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Dimitrakis, P. (2015). Introduction to NVM Devices. In: Dimitrakis, P. (eds) Charge-Trapping Non-Volatile Memories. Springer, Cham. https://doi.org/10.1007/978-3-319-15290-5_1

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