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S-box Pipelining Using Genetic Algorithms for High-Throughput AES Implementations: How Fast Can We Go?

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Progress in Cryptology -- INDOCRYPT 2014 (INDOCRYPT 2014)

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Abstract

In the last few years, several practitioners have proposed a wide range of approaches for reducing the implementation area of the AES in hardware. However, an area-throughput trade-off that undermines high-speed is not realistic for real-time cryptographic applications. In this manuscript, we explore how Genetic Algorithms (GAs) can be used for pipelining the AES substitution box based on composite field arithmetic. We implemented a framework that parses and analyzes a Verilog netlist, abstracts it as a graph of interconnected cells and generates circuit statistics on its elements and paths. With this information, the GA extracts the appropriate arrangement of Flip-Flops (FFs) that maximizes the throughput of the given netlist. In doing so, we show that it is possible to achieve a 50 % improvement in throughput with only an 18 % increase in area in the UMC 0.13 \(\mu \)m low-leakage standard cell library.

This work was supported in part by the Technology Foundation STW (project 12624 - SIDES), The Netherlands Organization for Scientific Research NWO (project ProFIL 628.001.007) and the ICT COST action IC1204 TRUDEVICE.

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Correspondence to Antonio de la Piedra .

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Batina, L., Jakobovic, D., Mentens, N., Picek, S., de la Piedra, A., Sisejkovic, D. (2014). S-box Pipelining Using Genetic Algorithms for High-Throughput AES Implementations: How Fast Can We Go?. In: Meier, W., Mukhopadhyay, D. (eds) Progress in Cryptology -- INDOCRYPT 2014. INDOCRYPT 2014. Lecture Notes in Computer Science(), vol 8885. Springer, Cham. https://doi.org/10.1007/978-3-319-13039-2_19

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  • DOI: https://doi.org/10.1007/978-3-319-13039-2_19

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