Abstract
The paper shows that designing lightweight block ciphers for the increasingly popular Field Programmable Gate Arrays (FPGAs) needs a new revisit. It shows that due to the underlying FPGA architecture many popular techniques for lightweight block ciphers which work on Application Specific Integrated Circuits (ASICs) does not apply to FPGAs. The paper identifies new methods and design criteria for lightweight block ciphers operating on FPGAs. Using these guidelines, a new block cipher Khudra based on the recursive Feistel structure is designed, which has a 64 bit block size and 80 bits of key. Rigorous cryptanalysis, ranging from linear and differential cryptanalysis to more powerful attacks like impossible differential, related key attacks etc. have been performed to justify that 18 rounds of Khudra provide sufficient security margin. Finally, the cipher has been implemented in two different flavors, Khudra-I and Khudra-II, on low cost FPGAs like Xilinx Spartan-III XC3S400 and extensively compared with other contemporary ciphers like PRESENT, Piccolo and compact implementations of other standard cipher like AES, Camellia etc. The implementation results show that Khudra requires at least around 45% less slices and 29% less AT product compared to round wise implementation of any of the contemporary lightweight block cipher.
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Kolay, S., Mukhopadhyay, D. (2014). Khudra: A New Lightweight Block Cipher for FPGAs. In: Chakraborty, R.S., Matyas, V., Schaumont, P. (eds) Security, Privacy, and Applied Cryptography Engineering. SPACE 2014. Lecture Notes in Computer Science, vol 8804. Springer, Cham. https://doi.org/10.1007/978-3-319-12060-7_9
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DOI: https://doi.org/10.1007/978-3-319-12060-7_9
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