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A New Nanoscale DG MOSFET Design with Enhanced Performance – A Comparative Study

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Signal Processing and Information Technology (SPIT 2012)

Abstract

Triple Material (TM) Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with high-k dielectric material as Gate Stack (GS) is presented in this paper. A lightly doped channel has been taken to enhance the device performance and reduce short channel effects (SCEs) such as drain induced barrier lowering (DIBL), sub threshold slope (SS), hot carrier effects (HCEs), channel length modulation (CLM). We investigated the parameters like Surface Potential, Electric field in the channel, SS, DIBL, Transconductance (gm ) for TM-GS-DG and compared with Single Material (SM) DG and TM-DG. The simulation and parameter extraction have been done by using the commercially available device simulation software ATLASTM.

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© 2014 ICST Institute for Computer Science, Social Informatics and Telecommunications Engineering

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Mohapatra, S.K., Pradhan, K.P., Sahu, P.K. (2014). A New Nanoscale DG MOSFET Design with Enhanced Performance – A Comparative Study. In: Das, V.V., Elkafrawy, P. (eds) Signal Processing and Information Technology. SPIT 2012. Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, vol 117. Springer, Cham. https://doi.org/10.1007/978-3-319-11629-7_11

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  • DOI: https://doi.org/10.1007/978-3-319-11629-7_11

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-11628-0

  • Online ISBN: 978-3-319-11629-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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