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On-Chip Radio Frequency ESD Protection Solution in GaAs pHEMT Process

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On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits

Abstract

Electrostatic discharge (ESD)-induced failure is a major concern for the pseudomorphic high electron mobility transistor (pHEMT)-based integrated circuits. This reliability issue is further worsened by the inherent low thermal conductivity of compound materials like gallium arsenides (GaAs) and aluminum gallium arsenides (AlGaAs). Nowadays, there has been a growing demand for the availability of robust ESD protection solutions for radio frequency integrated circuits (RFICs) fabricated in the pHEMT process. Stacked Schottky diodes could provide ESD protection in the GaAs pHEMT process. However, this approach has the disadvantages of a huge layout area, high leakage current, and large on-state resistance. On the other hand, a structure consisting of a shunting apparatus and external trigger unit is a more effective ESD protection scheme. A conventional single-gate GaAs pHEMT is usually used as the shunting apparatus, but the current conducting capability of such a device, and hence the GaAs pHEMT-based ESD protection clamp, is still quite limited due to the self-heating and current saturation mechanisms.

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Correspondence to Qiang Cui .

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© 2015 Springer International Publishing Switzerland

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Cui, Q., Liou, J., Hajjar, JJ., Salcedo, J., Zhou, Y., Parthasarathy, S. (2015). On-Chip Radio Frequency ESD Protection Solution in GaAs pHEMT Process. In: On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits. Springer, Cham. https://doi.org/10.1007/978-3-319-10819-3_4

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  • DOI: https://doi.org/10.1007/978-3-319-10819-3_4

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-10818-6

  • Online ISBN: 978-3-319-10819-3

  • eBook Packages: EngineeringEngineering (R0)

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