Abstract
This paper describes an introduction of NEC’s brand-new vector supercomputer, SX-ACE. The SX-ACE, which inherits and improves the NEC’s SX vector architecture, is developed to provide superior sustained performance, especially for memory-intensive applications. For this purpose, the SX-ACE processor achieves the world’s top-class single core performance of 64 GFLOPS and the world’s leading memory bandwidth of 64 GB/s per core. Moreover, the SX-ACE system is designed to reduce power consumption to one-tenth with just one-fifth the floor space as compared to the previous SX-9 model by maintaining the same system performance. In this paper, we elaborate on the design concept, architectural overview, and implementation of the SX-ACE. We also discuss the sustained performance of the SX-ACE for several benchmark codes. The evaluation results demonstrate significantly improved sustained performance and power efficiency of the SX-ACE system in comparison with the SX-9.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Momose, S., Hagiwara, T., Isobe, Y., Takahara, H.: The Brand-New Vector Supercomputer, SX-ACE. In: International Supercomputing Conference (ISC 2014), pp. 199–214 (2014)
Top500 supercomputing sites. http://www.top500.org/ (2013)
Working group of the Ministry of Education, Culture, Sports, Science and Technology of Japan, White Paper for Strategic Direction/Development of HPC in Japan (2012)
Satoshi, N., Satoru, T., Norihito, N., Takayuki, W., Akihiro, S.: Hardware Technology of the SX-9 (1) Main System. NEC Tech. J. 3(4), 15–18 (2008)
Takahara, H.: NEC SX Series Vector Supercomputer. In: Encyclopedia of Parallel Computing, vol. 4, pp. 1268–1277. Springer, Berlin (2011)
Soga, T., Musa, A., Shimomura, Y., Itakura, K., Okabe, K., Egawa, R., Takizawa, H., Kobayashi, H.: Performance Evaluation on NEC SX-9 using Real Science and Engineering Applications. In: Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, pp. 1–12 (2009)
Zeiser, T., Hager, G., Wellein, G.: The world’s fastest CPU and SMP node: Some performance results from the NEC SX-9. In: Proceedings of IEEE International Symposium on Parallel & Distributed Processing (IPDPS 2009), pp. 1–8 (2009)
The Himeno benchmark. http://accc.riken.jp/2444.htm (2013)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2015 Springer International Publishing Switzerland
About this paper
Cite this paper
Hoshi, N., Momose, S. (2015). SX-ACE, the Brand-New Vector Supercomputer for Higher Sustained Performance II. In: Resch, M., Bez, W., Focht, E., Kobayashi, H., Patel, N. (eds) Sustained Simulation Performance 2014. Springer, Cham. https://doi.org/10.1007/978-3-319-10626-7_6
Download citation
DOI: https://doi.org/10.1007/978-3-319-10626-7_6
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-10625-0
Online ISBN: 978-3-319-10626-7
eBook Packages: Mathematics and StatisticsMathematics and Statistics (R0)