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Engineered Substrates for Advanced CMOS Technology Nodes and More-Than-Moore Applications

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Functional Nanomaterials and Devices for Electronics, Sensors and Energy Harvesting

Part of the book series: Engineering Materials ((ENG.MAT.))

Abstract

Traditional planar bulk or partially depleted SOI (PDSOI) CMOS transistor architectures at present leading edge of miniaturization are plagued by limitations due to unacceptably high current leakages and variability. To cope with these intrinsic limitations there is a need to introduce innovative technologies which take advantage of the benefits of Fully Depleted (FD) devices. There are two main architectures for the undoped channel FD device: 3D FinFETs (SOI or bulk-based) and 2D FDSOI-based transistors. Both of them are being introduced in high volume manufacturing (HVM). A pioneer of SOI concept, silicon on sapphire (SOS) substrates, have recently entered a mainstream radio frequency (RF) application market. Other flavors of engineered substrates, e.g. for photonics or 3D-based applications, have moved from research to industrial development phase. In this work an overview of the recent advances in the development of the engineered substrates for More Moore and More-than-Moore applications will be presented.

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Acknowledgments

Fruitful discussions and advices provided by B.-Y. Nguyen, W. Schwarzenbach, C. Aulnette, N. Daval, O. Bonnin, F. Allibert, L. Ecarnot, P. Nguyen, X. Cauchy, I. Radu, M. Sadaka, E. Desbonnets, C. Cailler, A. Rigny, and many other colleagues at Soitec, CEA-LETI, IMEP-LAHC, and STMicroelectronics are gratefully acknowledged.

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Authors and Affiliations

  1. Soitec, Parc Technologique Des Fontaines, 38190, Bernin, France

    Konstantin K. Bourdelle

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  1. Konstantin K. Bourdelle
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Correspondence to Konstantin K. Bourdelle .

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Editors and Affiliations

  1. National Academy of Science of Ukraine, Lashkaryov Institute of Semiconductor Physics, Kyiv, Ukraine

    Alexei Nazarov

  2. Sinano InstituteIMEP-LAHC, CNRS Grenoble, IMEP-LAHC, Grenoble, France

    Francis Balestra

  3. ICTEAM Institute Microelectronics Laboratory, Université catholique de Louvain, Louvain-la-Neuve, Belgium

    Valeriya Kilchytska

  4. ICTEAM Institute, ELEN (Electrical Engineering), Université catholique de Louvain, Louvain-la-Neuve, Belgium

    Denis Flandre

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Bourdelle, K.K. (2014). Engineered Substrates for Advanced CMOS Technology Nodes and More-Than-Moore Applications. In: Nazarov, A., Balestra, F., Kilchytska, V., Flandre, D. (eds) Functional Nanomaterials and Devices for Electronics, Sensors and Energy Harvesting. Engineering Materials. Springer, Cham. https://doi.org/10.1007/978-3-319-08804-4_1

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