Abstract
The demand for higher integration level and lower production cost has driven mm-wave electronics, which have traditionally been implemented in III-V technologies for better RF performance, to be also implemented in CMOS. This motivates the digitization of the mm-wave systems for improved RF performance. This paper focuses on a digitally intensive architecture and time-domain circuit and calibration techniques for mm-wave frequency synthesizer. A 60-GHz all-digital phase-locked loop (ADPLL) transmitter prototype, implemented in 65-nm CMOS, achieves excellent phase noise (−75 dBc/Hz at 10 kHz offset), fast locking (3 μs), low reference spurs (−74 dBc), and linear frequency modulation up to 1 GHz in range.
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Wu, W., Staszewski, R.B., Long, J.R. (2015). Time-Domain Techniques for mm-Wave Frequency Generation. In: Harpe, P., Baschirotto, A., Makinwa, K. (eds) High-Performance AD and DA Converters, IC Design in Scaled Technologies, and Time-Domain Signal Processing. Springer, Cham. https://doi.org/10.1007/978-3-319-07938-7_15
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DOI: https://doi.org/10.1007/978-3-319-07938-7_15
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