Sampled Data Systems

Abstract

In this chapter, analytical tuning rules for digital PID type-I, type-II, type-III control loops are presented. Controller parameters are determined explicitly as a function of the process parameters and the sampling time $T_\mathrm{s}$ of the controller. For developing the proposed theory in type-I, type-II control loops, a generalized single-input single-output stable process model is used consisting of $n$-poles, $m$-zeros plus unknown time delay-$d$. As far as type-III control loops is concerned the principle of pole-zero cancellation according to the method proposed in Sect. 5.2.1, see [3], is followed. The derivation of the proposed PID control law lies in the principle of the Magnitude Optimum criterion and the optimization conditions proved in Appendix A.1 are used for extracting the explicit solution. For all control loop types, a performance comparison is presented in terms of simulation examples. The comparison focuses on the effect of the sampling time $T_\mathrm{s}$ to the control loops response both in the time and frequency domain.