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Decoder Hardware Architecture for HEVC

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High Efficiency Video Coding (HEVC)

Part of the book series: Integrated Circuits and Systems ((ICIR))

Abstract

This chapter provides an overview of the design challenges faced in the implementation of hardware HEVC decoders. These challenges can be attributed to the larger and diverse coding block sizes and transform sizes, the larger interpolation filter for motion compensation, the increased number of steps in intra prediction and the introduction of a new in-loop filter. Several solutions to address these implementation challenges are discussed. As a reference, results for an HEVC decoder test chip are also presented.

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Acknowledgements

The authors gratefully acknowledge the support of Texas Instruments for sponsoring the HEVC decoder test chip project and Taiwan Semiconductor Manufacturing Company (TSMC) University Shuttle program for manufacturing the chip.

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Authors and Affiliations

  1. Massachusetts Institute of Technology, 77 Massachusetts Avenue, Cambridge, MA, 02139, USA

    Mehul Tikekar, Chiraag Juvekar, Vivienne Sze & Anantha Chandrakasan

  2. National Tsing Hua University, Hsinchu, Taiwan

    Chao-Tsung Huang

Authors
  1. Mehul Tikekar
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  2. Chao-Tsung Huang
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  3. Chiraag Juvekar
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  4. Vivienne Sze
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  5. Anantha Chandrakasan
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Corresponding author

Correspondence to Mehul Tikekar .

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Editors and Affiliations

  1. Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, Massachusetts, USA

    Vivienne Sze

  2. Plano, Texas, USA

    Madhukar Budagavi

  3. Bellevue, Washington, USA

    Gary J. Sullivan

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Tikekar, M., Huang, CT., Juvekar, C., Sze, V., Chandrakasan, A. (2014). Decoder Hardware Architecture for HEVC. In: Sze, V., Budagavi, M., Sullivan, G. (eds) High Efficiency Video Coding (HEVC). Integrated Circuits and Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-06895-4_10

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  • DOI: https://doi.org/10.1007/978-3-319-06895-4_10

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-06894-7

  • Online ISBN: 978-3-319-06895-4

  • eBook Packages: EngineeringEngineering (R0)

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