Abstract
As discussed in Sect. 2.3, the fundamental challenge for functionally verifying DRS designs is to resolve the conflicting requirements for modeling accuracy and verification productivity. For simulation-based verification, the designer needs to strike the right balance between the level of simulation accuracy and the level of detail of the fabric being simulated. Furthermore, this balance is constrained by the desire for the simulated design to be implementation ready. In this chapter, we derive a general approach to modeling DPR and show that the proposed approach meets the above-mentioned requirements.
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Notes
- 1.
To focus on partial reconfiguration, this example excludes irrelevant sections.
- 2.
To focus on state saving, this example excludes irrelevant sections.
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Gong, L., Diessel, O. (2015). Modeling Reconfiguration. In: Functional Verification of Dynamically Reconfigurable FPGA-based Systems. Springer, Cham. https://doi.org/10.1007/978-3-319-06838-1_3
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DOI: https://doi.org/10.1007/978-3-319-06838-1_3
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