Abstract
This paper presents a design space exploration methodology based on higher-order functions to facilitate the tradeoff between execution time and area usage on FPGAs. Higher-order function are transformed, resulting in parameterized nodes where the amount of parallelism and thereby performance, can be controlled. For composition and scheduling of operations, dataflow principles are used. To show the validity of the approach, a particle filter has been transformed and synthesized for FPGA. The resulting architecture is parameterizable and achieves good performance.
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References
Arulampalam, M., Maskell, S., Gordon, N., Clapp, T.: A tutorial on particle filters for online nonlinear/non-gaussian bayesian tracking. IEEE Transactions on Signal Processing 50(2), 174–188 (2002)
Jones, S.P. (ed.): Haskell 98 Language and Libraries. Journal of Functional Programming, vol. 13 (2003)
Baaij, C.P.R., Kooijman, M., Kuper, J., Boeijink, W.A., Gerards, M.E.T.: CλaSH: Structural descriptions of synchronous hardware using Haskell. In: Proceedings of the 13th EUROMICRO Conference on Digital System Design: Architectures, Methods and Tools, Lille, France, USA, pp. 714–721. IEEE Computer Society (September 2010)
Bolić, M., Djurić, P.M., Hong, S.: Resampling algorithms for particle filters: a computational complexity perspective. EURASIP J. Appl. Signal Process. 2004, 2267–2277 (2004)
Cho, J.U., Jin, S.H., Pham, X.D., Jeon, J.W., Byun, J.E., Kang, H.: A real-time object tracking system using a particle filter. In: 2006 IEEE/RSJ International Conference on Intelligent Robots and Systems, pp. 2822–2827 (2006)
Saha, S., Bambha, N.K., Bhattacharyya, S.S.: Design and implementation of embedded computer vision systems based on particle filters. Computer Vision and Image Understanding 114(11), 1203–1214 (2010)
Hong, S., Liang, X., Djuric, P.: Reconfigurable particle filter design using dataflow structure translation. In: IEEE Workshop on Signal Processing Systems, SIPS 2004, pp. 325–330 (2004)
Wester, R., Baaij, C.P.R., Kuper, J.: A two step hardware design method using CλaSH. In: 22nd International Conference on Field Programmable Logic and Applications, FPL 2012, Oslo, Norway, USA, pp. 181–188. IEEE Computer Society (August 2012)
Sheeran, M.: mufp, a language for vlsi design. In: Proceedings of the 1984 ACM Symposium on LISP and Functional Programming, LFP 1984, pp. 104–112. ACM, New York (1984)
Bjesse, P., Claessen, K., Sheeran, M., Singh, S.: Lava: hardware design in Haskell. In: Proceedings of the Third ACM SIGPLAN International Conference on Functional Programming, ICFP 1998, pp. 174–184. ACM, New York (1998)
Sheeran, M.: Designing regular array architectures using higher order functions. In: Jouannaud, J.-P. (ed.) FPCA 1985. LNCS, vol. 201, pp. 220–237. Springer, Heidelberg (1985)
Lee, E., Messerschmitt, D.: Synchronous data flow. Proceedings of the IEEE 75(9), 1235–1245 (1987)
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Wester, R., Kuper, J. (2014). Design Space Exploration of a Particle Filter Using Higher-Order Functions. In: Goehringer, D., Santambrogio, M.D., Cardoso, J.M.P., Bertels, K. (eds) Reconfigurable Computing: Architectures, Tools, and Applications. ARC 2014. Lecture Notes in Computer Science, vol 8405. Springer, Cham. https://doi.org/10.1007/978-3-319-05960-0_21
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DOI: https://doi.org/10.1007/978-3-319-05960-0_21
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