Abstract
In this paper, we show FPGA implementation of a real-time video-based abnormal action detection system, which is a key basic function of applications such as security systems and monitoring systems for nursing elderly people. Our system extracts Cubic Higher order Local Auto-Correlation (CHLAC) features from input video frames and detects abnormal actions with a subspace method based on Candid Covariance-free Incremental Principal Component Analysis (CCIPCA). Empirical experiments demonstrate our system works well at 62.5 fps, which is limited by a camera device. The system implemented on the FPGA is estimated to achieve up to 240 fps, which corresponds to 8.6 times speedup compare to software execution on a PC. It is also shown that the FPGA implementation is more than 20 times energy efficient than the software execution.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Otsu, N.: Towards flexible and intelligent vision systems-from thresholding to CHLAC. In: IAPR Conference on Machine Vision Application, pp. 430–439 (2005)
Nanri, T., Otsu, N.: Unsupervised abnormality detection in video surveillance. In: IAPR Conference on Machine Vision Applications, pp. 574–577 (2005)
Weng, J., Zhang, Y., Hwang, W.S.: Candid covariance-free incremental principal component analysis. IEEE Trans. on Pattern Analysis and Machine Intelligence 25(8), 1034–1040 (2003)
Ishii, I., Sukenobe, R., Yamamoto, K., Takaki, T.: Real-time image recognition using hlac features at 1000 fps. In: Proceedings of the 2009 International Conference on Robotics and Biomimetics, pp. 954–959 (2009)
Shiraki, T., Saito, H., Kamoshida, Y., Ishiguro, K., Fukano, R., Shirai, T., Taura, K., Otake, M., Sato, T., Otsu, N.: Real-time motion recognition using chlac features and cluster computing. In: Proceedings of the 3rd IFIP International Conference on Network and Parallel Computing, pp. 50–56 (2006)
Dohi, K., Yorita, Y., Shibata, Y., Oguri, K.: Pattern compression of FAST corner detection for efficient hardware implementation. In: Proc. IEEE 21st Int. Conf. Field Programmable Logic and Applications, pp. 478–481 (September 2011)
Negi, K., Dohi, K., Shibata, Y., Oguri, K.: Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm. In: Proc. Int. Conf. Field-Programmable Technology, pp. 1–8 (December 2011)
Dohi, K., Hatanaka, Y., Negi, K., Shibata, Y., Oguri, K.: Deep-pipelined FPGA implementation of ellipse estimation for eye tracking. In: Proc. IEEE 22st Int. Conf. Field Programmable Logic and Applications, pp. 458–463 (2012)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer International Publishing Switzerland
About this paper
Cite this paper
Hamasaki, K., Dohi, K., Shibata, Y., Oguri, K. (2014). FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis. In: Goehringer, D., Santambrogio, M.D., Cardoso, J.M.P., Bertels, K. (eds) Reconfigurable Computing: Architectures, Tools, and Applications. ARC 2014. Lecture Notes in Computer Science, vol 8405. Springer, Cham. https://doi.org/10.1007/978-3-319-05960-0_17
Download citation
DOI: https://doi.org/10.1007/978-3-319-05960-0_17
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-05959-4
Online ISBN: 978-3-319-05960-0
eBook Packages: Computer ScienceComputer Science (R0)