Abstract
Inductive-coupling is a 3D integration technique that can stack more than three known-good-dies in a System-in-Package (SiP) without wire connections. To make the best use of wireless property, the 3D ICs would have a great flexibility to customize the number of processor chips, SRAM chips, and DRAM chips in a SiP after the chip fabrication.
In this work, we design a deadlock-free routing protocol for such 3-D chips in which each chip has different Network-on-Chip (NoC) topologies. We classify two-surface NoC of each chip into is 2D mesh and irregular structure in order to apply the custom routing algorithm to its topology. In mesh topologies, X-Y routing is used for well traffic distribution, while Up*/Down* routing is applied for reduced path hops in irregular topologies. Evaluation results show that the average number of hop count in uniform traffic can be improved by up to 11.8%, and the average hop count in neighbor traffic can be improved up to 6.1%.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Black, B., et al.: Die Stacking (3D) Microarchitecture. In: Proceedings of the International Symposium on Microarchitecture (MICRO 2006), pp. 469–479 (December 2006)
Rhett Davis, W., et al.: Demystifying 3D ICs: The Pros and Cons of Going Vertical. IEEE Design and Test of Computers 22(6), 498–510 (2005)
Miura, N., et al.: A 0.14pJ/b Inductive-Coupling Inter-Chip Data Transceiver with Digitally-Controlled Precise Pulse Shaping. In: Proc. of ISSCC 2007, pp. 358–359 (February 2007)
Radecki, A., Chung, H., Yoshida, Y., Miura, N., Shidei, T., Ishikuro, H., Kuroda, T.: 6W/25mm 2 inductive power transfer for non-contact wafer-level testing. In: Proc. IEEE Int. Solid-State Circuits Conf. Digest of Technical Papers (ISSCC), pp. 230–232 (February 2011)
Matsutani, H., et al.: A Vertical Bubble Flow Network using Inductive-Coupling for 3-D CMPs. In: Proc. of the 5th ACM/IEEE International Symposium on Networks-on-Chip (NOCS 2011), pp. 49–56 (May 2011)
Flich, J., et al.: A Survey and Evaluation of Topology Agnostic Deterministic Routing Algorithms. IEEE Trans. on Parallel and Distributed Systems 23(3), 405–425 (2012)
Kanda, K., et al.: 1.27-Gbps/pin, 3mW/pin Wireless Superconnect (WSC) Interface Scheme. In: Proc. of ISSCC 2003, pp. 186–187 (February 2003)
Miura, N., et al.: A 1Tb/s 3W Inductive-Coupling Transceiver for Inter-Chip Clock and Data Link. In: Proc. of ISSCC 2006, pp. 424–425 (February 2006)
Zhang, H., Matsutani, H., Take, Y., Kuroda, T., Amano, H.: Vertical Link On/Off Control Methods for Wireless 3-D NoCs. In: Herkersdorf, A., Römer, K., Brinkschulte, U. (eds.) ARCS 2012. LNCS, vol. 7179, pp. 212–224. Springer, Heidelberg (2012)
Zhang, H., Matsutani, H., Koibuchi, M., Amano, H.: Dynamic power on/off method for 3D NoCs with wireless inductive-coupling links. In: Proceedings of the 16th IEEE Symposium on Low-Power and High-Speed Chips (Cool Chips XVI), pp. 1–3 (2013)
Matsutani, H., et al.: A Case for Wireless 3D NoCs for CMPs. In: Proceedings of the 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013) (January 2013)
Jouraku, A., Koibuchi, M., Amano, H.: An Effective Design of Deadlock-Free Routing Algorithms Based on 2-D Turn Model for Irregular Networks 18(3), 320–333 (March 2007)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2013 Springer International Publishing Switzerland
About this paper
Cite this paper
Sasaki, D., Zhang, H., Matsutani, H., Koibuchi, M., Amano, H. (2013). A Routing Strategy for Inductive-Coupling Based Wireless 3-D NoCs by Maximizing Topological Regularity. In: Aversa, R., Kołodziej, J., Zhang, J., Amato, F., Fortino, G. (eds) Algorithms and Architectures for Parallel Processing. ICA3PP 2013. Lecture Notes in Computer Science, vol 8286. Springer, Cham. https://doi.org/10.1007/978-3-319-03889-6_9
Download citation
DOI: https://doi.org/10.1007/978-3-319-03889-6_9
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-03888-9
Online ISBN: 978-3-319-03889-6
eBook Packages: Computer ScienceComputer Science (R0)