Abstract
Network-on-chip (NoC) are considered the next generation of communication infrastructure, which will be omnipresent in most of industry, office and personal electronic systems. In the platform-based methodology, an application is implemented by a set of collaborating intellectual properties (IPs) blocks. In this chapter, we use multi-objective evolutionary optimization to address the problem of mapping topologically pre-selected sets IPs, which constitute the set of optimal solutions that were found for the IP assignment problem, on the tiles of a mesh-based NoC. The IP mapping optimization is driven by the area occupied, execution time and power consumption.
This chapter was developed in collaboration with Marcus Vinícius Carvalho da Silva.
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Nedjah, N., de Macedo Mourelle, L. (2014). Application Mapping in Network-on-Chip Using Evolutionary Multi-objective Optimization. In: Hardware for Soft Computing and Soft Computing for Hardware. Studies in Computational Intelligence, vol 529. Springer, Cham. https://doi.org/10.1007/978-3-319-03110-1_10
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DOI: https://doi.org/10.1007/978-3-319-03110-1_10
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-03109-5
Online ISBN: 978-3-319-03110-1
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