Improved Underlap FinFET with Asymmetric Spacer Permittivities
A much higher performance can be achieved by the use of a high-K spacer for only the SE region of the Underlap FinFET. We explain this effect using a 3-transistor equivalent circuit in the FinFET device. Our new device design does not increase OFF state current.
KeywordsUnderlap FinFET High-K spacer Delay Ion Ioff
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