Memristor-based Memory Cell with Less Noise Margins and Storing Non-Binary Data
Memristor has been realized as a non-linear, two terminal physical device recently by HP labs. Memristor is considered as the fourth fundamental circuit element. Technologies using memristor provides much better scalability, higher utilization as memory storage, non-volatility and overall lower power consumptions as compared to conventional CMOS technology. A detailed study of the non-linear model of the memristor has been done. The time and the voltage characteristics of stable read and write operations, and the tradeoffs between the various design parameters such as voltage, frequency, noise margin, and area are included in this paper. Based on this modeling we compare a generic hybrid CMOS-Memristor memory cell and a memristor-SRAM cell with less noise margins and very low power. We also extend the notion of binary storage of the memristor to other number systems as well. The memristor can be used to represent number system by the virtue of different memory states it possess i.e. non-binary storage using memory array.
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