Advertisement

Impact of Fin Sidewall Taper Angle on Sub-14 nm FinFET Device Performance

  • Abhisek Dixit
  • Terence B. Hook
  • Jeffrey B. Johnson
  • E. J. Nowak
  • Kota V. Murali
Part of the Environmental Science and Engineering book series (ESE)

Abstract

Recent advances in FinFET technology include fins with tapered sidewalls in addition to conventional vertical sidewall fins. Our 3-D TCAD simulation results suggest that for low to moderately doped fins, vertical sidewall fins have superior electrical performance. Only at extremely high fin doping concentrations could tapered sidewall fins be electrically beneficial.

Keywords

FinFET Sidewall tapering TCAD 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    P. Hashemi et al, “High-Performance Si1-xGex Channel on Insulator Trigate PFETs Featuring an Implant-Free Process and Aggressively-Scaled Fin and Gate Dimensions”, Symp. VLSI Tech., 2013.Google Scholar
  2. 2.
    R. Brian et al, “A 22 nm High Performance Embedded DRAM SoC Technology Featuring Tri-gate Transistors and MIMCAP COB”, Symp. VLSI Tech., 2013.Google Scholar
  3. 3.
    T. Hook, “Fully Depleted Devices for Designers: FDSOI and FinFETs,” Custom Integrated Circuits Conference, 2012.Google Scholar
  4. 4.
    T. Hook, “FinFET Isolation Considerations and Ramifications: Bulk vs SOI,” Advanced Substrate News, April 2013.Google Scholar
  5. 5.
    Auth C. et al, “A 22 nm high performance and low-power CMOS technology featuring fully-depleted tri-gate transistors, self-aligned contacts and high density MIM capacitors”, Symp. VLSI Tech., 2012.Google Scholar
  6. 6.
    Sentaurus Structure Editor, Version D-2010.03, Synopsys Inc., March 2010Google Scholar
  7. 7.
    M. Ieong et al., “Technology Modeling for Emerging SOI Devices”, SISPAD 2002, pp. 225-230, 2002.Google Scholar

Copyright information

© Springer International Publishing Switzerland 2014

Authors and Affiliations

  • Abhisek Dixit
    • 1
  • Terence B. Hook
    • 2
  • Jeffrey B. Johnson
    • 2
  • E. J. Nowak
    • 2
  • Kota V. Murali
    • 1
  1. 1.TCAD and Nanotechnology GroupIBM Semiconductor Research and Development CenterBangaloreIndia
  2. 2.IBM Semiconductor Research and Development CenterBurlingtonUSA

Personalised recommendations