Abstract
As the size of the MOSFET is reduced, various short channel effects (SCEs) appears that degrade its performance. Multigate nanowire FET is one of the novel nanoelectronic devices that overcome these MOSFET limitations. The silicon nanowire field effect transistors with multiple gates around the silicon channel can significantly improve the gate control and are considered to be promising candidates for the next generation transistors. In this paper, we have considered the performance limits of Si nanowire field effect transistors in a Gate All Around (GAA) structure. Furthermore, we have studied the effects of Silicon body thickness on the characteristics of GAA silicon nanowire FET. It has been observed that Si-NWFET afford high drive-current (Ion), high transconductance and hence high gain. Thus, GAA configuration has good control of gate, which reduces the short-channel effects to a great extent.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
K. Nakajima, Interface-state density of three dimensional silicon channels measured by charge pumping method, (M.S. Thesis, Tokyo Institute of Technology, 2012)
R. G. Arms, Engineering Science and Education Journal, 7, 233, (1998).
S. E. Thompson, IEEE Electron Device Letters, 25, 191, (2004).
Y. Kim, IEEE International Electron Devices Meeting, 1, 20.2.1, (2001).
B. Cheng, M. Cao, R. Rao, A. Inani, P.V. Voorde, W. M. Greene, JMC. Stark, P. M. Zeitzoff and J. C. S. Woo, IEEE Transactions on Electron Devices, 46, 1537, (1999).
Y. K. Choi, N. Lander, P. Xuans, S. Tang, D. Ha, E. Anderson, T. J. King, J. Bokor and C. Hu, International Electron Device Meeting Technical Digest, 23, 421, (2001).
N. Singh, “High-Performance fully depleted silicon Nano wire (diameter ≤ 5 nm) gate all around CMOS devices”, IEEE Electronic Devices Letters, 27, pp. 383-386, 2006.
F. D. Agostino and D.Quercia, “Short- Channel Effects in MOSFETs”, 2000.
S. P. V. M. Rao, E. V. L. N. Rangacharyulu and K. L. Kishore, “Parameter Optimization of GAA Nanowire FET Using Taguchi Method”, IJTERT, 1, pp. 1-5, 2012.
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer International Publishing Switzerland
About this paper
Cite this paper
Gupta, R., Dass, D., Prasher, R., Vaid, R. (2014). Impact of Silicon Body Thickness on the Performance of Gate-all-around Silicon Nanowire Field Effect Transistor. In: Jain, V., Verma, A. (eds) Physics of Semiconductor Devices. Environmental Science and Engineering(). Springer, Cham. https://doi.org/10.1007/978-3-319-03002-9_177
Download citation
DOI: https://doi.org/10.1007/978-3-319-03002-9_177
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-03001-2
Online ISBN: 978-3-319-03002-9
eBook Packages: Earth and Environmental ScienceEarth and Environmental Science (R0)