Minimum Memory Vectorisation of Wavelet Lifting
With the start of the widespread use of discrete wavelet transform the need for its effective implementation is becoming increasingly more important. This work presents a novel approach to discrete wavelet transform through a new computational scheme of wavelet lifting. The presented approach is compared with two other. The results are obtained on a general purpose processor with 4-fold SIMD instruction set (such as Intel x86-64 processors). Using the frequently exploited CDF 9/7 wavelet, the achieved speedup is about 3× compared to naive implementation.
Keywordsdiscrete wavelet transform lifting scheme parallelization vectorisation SIMD
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- 1.Adams, M.D.: Reversible integer-to-integer wavelet transforms for image coding. Ph.D. thesis, Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada (September 2002)Google Scholar
- 3.Chrysafis, C., Ortega, A.: Minimum memory implementations of the lifting scheme. In: Proceedings of SPIE, Wavelet Applications in Signal and Image Processing VIII. SPIE, vol. 4119, pp. 313–324 (2000)Google Scholar
- 6.Kutil, R.: A single-loop approach to SIMD parallelization of 2-D wavelet lifting. In: Proceedings of the 14th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), pp. 413–420 (2006)Google Scholar
- 7.Kutil, R., Eder, P., Watzl, M.: SIMD parallelization of common wavelet filters. In: Parallel Numerics 2005, pp. 141–149 (2005)Google Scholar
- 8.Mallat, S.: A Wavelet Tour of Signal Processing: The Sparse Way. With contributions from Gabriel Peyré, 3rd edn. Academic Press (2009)Google Scholar