Abstract
This chapter illustrates the application of the proposed methodology to practical examples. The framework of the proposed methodology for the automatic generation of analog integrated circuits (IC) layout has been coded in JAVA and was executed, for the presented examples, on an Intel® Core™ 2 Quad CPU 2.4 GHz with 6 GB of RAM.
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Reference
N. Lourenço, N. Horta, in GENOM-POF: Multi-Objective Evolutionary Synthesis of Analog ICs with Corners Validation. GECCO’ 12: Proceedings of the 14th International Conference on Genetic and Evolutionary Computation Conference, July 2012, pp. 1119–1126
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Rocha, F.A.E., Martins, R.M.F., Lourenço, N.C.C., Horta, N.C.G. (2014). Results. In: Electronic Design Automation of Analog ICs combining Gradient Models with Multi-Objective Evolutionary Algorithms. SpringerBriefs in Applied Sciences and Technology(). Springer, Cham. https://doi.org/10.1007/978-3-319-02189-8_5
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DOI: https://doi.org/10.1007/978-3-319-02189-8_5
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Publisher Name: Springer, Cham
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Online ISBN: 978-3-319-02189-8
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