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A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS

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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 265))

Abstract

This chapter presents a unified platform for design and verification of mixed-signal systems using SystemC-AMS standard. The platform bases on a bottom-up design and a top-down verification methodologies. In the methodologies, several hierarchical abstraction levels of the system are considered. These abstraction levels are: system, functional, macromodel and circuit levels. We introduce a simple and efficient solution to implement an interface between system level models and their circuit level realizations. Simulation tools such as SystemC-AMS and Spice simulators are combined with a sizing tool named CHAMS, in order to achieve a unified and standard design and verification environment. Moreover, a transient simulation scheme is proposed to simulate nonlinear dynamic behavior of complete mixed-signal systems. The unified platform is used to design and verify a pipeline ADC. The simulation results prove the effectiveness of the proposed structure and methodology.

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Acknowledgements

This work was funded by the project Verification For Heterogenous Reliable Design and Integration (VERDI), which is supported by the European Commission within the 7th Framework Programme for Research and Technological Development (FP7/ICT 287562).

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Correspondence to Yao Li .

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Li, Y., Iskander, R., Javid, F., Louërat, MM. (2014). A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS. In: Haase, J. (eds) Models, Methods, and Tools for Complex Chip Design. Lecture Notes in Electrical Engineering, vol 265. Springer, Cham. https://doi.org/10.1007/978-3-319-01418-0_6

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  • DOI: https://doi.org/10.1007/978-3-319-01418-0_6

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-01417-3

  • Online ISBN: 978-3-319-01418-0

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