Skip to main content

Hafnium Dioxide-Based Double-Pole Four-Throw Double-Gate RF CMOS Switch

  • Chapter
  • First Online:
  • 1086 Accesses

Part of the book series: Analog Circuits and Signal Processing ((ACSP,volume 122))

Abstract

Established radio-frequency complementary metal-oxide-semiconductor (RF CMOS) switch contains MOSFET in its main architecture with 5.0 V of control voltage and requires high value of resistance in circuitry of the transceivers to detect the signal. To avoid the high value of control voltage and resistances, we have designed a novel double-pole four-throw (DP4T) RF switch by using the MOSFET technology and analyzed its performance in terms of drain currents and switching speed in the previous chapters. The reduction in sizing ratio of the gate dielectric, which works as a capacitor in the MOSFET, results in the increase of capacitance and speed of the device. However, this process has reached up to the limit where further reduction of SiO2 thickness increases the leakage current above the acceptable limit. This problem can be resolved by replacing SiO2 with materials having high dielectric constants. Hafnium dioxide (also known as Hafnia) is one of them, which has relatively large energy bandgap and a better thermal stability as compared to silicon [1]. It is a leading contender for new high-k gate dielectric films.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   119.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD   109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

References

  1. T. Manku, “Microwave CMOS device physics and design,” IEEE J. of Solid State Circuits, vol. 34, no. 3, pp. 277–285, March 1999.

    Google Scholar 

  2. International Technology Roadmap for Semiconductors (ITRS), www.itrs.net

  3. A. Cerdeira, B. Iniguez, and M. Estrada, “Compact model for short channel symmetric doped double-gate MOSFETs,” Solid State Electronics, vol. 52, no. 7, pp. 1064–1070, July 2008.

    Google Scholar 

  4. Behzad Razavi, RF Microelectronics, 3rd Edition, Prentice Hall, New Jersey, 1998.

    Google Scholar 

  5. H. S. Baik and S. J. Pennycook, “Interface structure and non-stoichiometry in HfO2 dielectrics,” IEEE Applied Physics Letter, vol. 85, pp. 672–674, 2009.

    Google Scholar 

  6. Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Analysis of drain current and switching speed for SPDT switch and DPDT switch with proposed DP4T RF CMOS switch,” J. of Circuits, Systems and Computers, vol. 21, no. 4, pp. 1–18, June 2012.

    Google Scholar 

  7. J. C. Lee, “Single-layer thin HfO2 gate dielectric with n+ poly-Silicon,” Proc. of IEEE Symposium on VLSI Technology, Honolulu, Huwaii, USA, 13–15 June 2000, pp. 44–45.

    Google Scholar 

  8. Tingting Tan, Zhengtang Liu, Hongcheng Lu, Wenting Liu, Feng Yan, and Wenhua Zhang, “Band structure and valence band offset of HfO2 thin film on Si substrate from photoemission spectroscopy,” J. of Applied Physics A: Materials Science and Processing, vol. 97, no. 2, pp. 475–479, 2009.

    Google Scholar 

  9. N Shashank, S Basak, and R.K Nahar, “Design and simulation of nano scale high-k based MOSFETs with poly Silicon and metal gate electrodes,” Int. J. of Advancements in Technology, vol. 1, No. 2, pp. 252–261, 2010.

    Google Scholar 

  10. Yuan Taur, “CMOS Scaling into the Nanometer Regime,” Proc. of IEEE Journal, vol. 85, no. 4, pp. 486–504, April 1997.

    Google Scholar 

  11. Riza Tamer and Kausik Roy, “Analysis of options in double-gate MOS technology: A circuit perspective” IEEE Trans. on Electron Devices, vol. 54, no. 12, pp. 3361–3368, Dec. 2007.

    Google Scholar 

  12. Kim Keunwoo, Ching Te Chuang, J. B. Kuang, and K. J. Nowka, “Low-power high-performance asymmetrical double-gate circuits using back-gate controlled wide tunable range diode voltage,” IEEE Trans. on Electron Devices, vol. 54, no. 9, pp. 2263–2268, Sept. 2007.

    Google Scholar 

  13. A. M. Street, “RF switches design,” The Institution of Electrical Engineers, London, vol. 4, pp. 1–7, 2000.

    Google Scholar 

  14. Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch,” Microelectronics Journal, vol. 42, no. 3, pp. 527–534, March 2011.

    Google Scholar 

  15. Gary K. Yeap, Farid N. Najm, Low power VLSI design and technology, Pearson Addison Wesley, 1st Edition, 2008.

    Google Scholar 

  16. T. H. Lee, The Design of CMOS Radio Frequency Integrated Circuits, Cambridge University Press, 2nd Edition, 2004.

    Google Scholar 

  17. Eric Pop, “Energy dissipation and transport in nanoscale devices,” J. of Nano Research, vol. 3, no. 3, pp. 147–169, 2010.

    Google Scholar 

  18. Viranjay M. Srivastava, K. S. Yadav, G. Singh, “Design and performance analysis of cylindrical surrounding double-gate MOSFET,” Microelectronics Journal, vol. 42, no. 10, pp. 1124–1135, Oct. 2011.

    Google Scholar 

  19. Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “DP4T RF CMOS switch: A better option to replace SPDT switch and DPDT switch,” Recent Patents on Electrical and Electronic Engineering, vol. 5, no. 3, pp. 244–248, Oct. 2012.

    Google Scholar 

  20. ‘Aluminum oxide, Al2O3 for optical coating: A product catalogue’ MATERION Advanced Chemicals, USA, 2008.

    Google Scholar 

  21. Thomas Sokollik, “Investigations of Field Dynamics in Laser Plasmas with Proton Imaging,” Plasma Physics, vol. 1, pp. 17–24, 2011.

    Google Scholar 

  22. Ta Chang Tien, Li Chuan Lin, Lurng Shehng Lee, Chi Jen Hwang, Siddheswar Maikap, and Yuri M. Shulga, “Analysis of weakly bonded oxygen in HfO2/SiO2/Si stacks by using HRBS and ARXPS,” J. of Material Science: Material Electronics, vol. 21, no. 5, pp. 475–480, 2010.

    Google Scholar 

  23. A. P. Huang, Z. C. Yang, and Paul K. Chu, “Hafnium based high-k gate dielectrics,” Advances in Solid State Circuits Technologies, pp. 333–350, April 2010.

    Google Scholar 

  24. Yuhua Cheng, M. Deen, and Chih Chen, “MOSFET modeling for RF IC design,” IEEE Trans. on Electron Devices, vol. 52, no. 7, pp. 1286–1303, July 2005.

    Google Scholar 

  25. S. Panda and M. Ray Kanjilal, “Thermal and Flicker noise modeling of a double gate MOSFET,” J. of Advances in Power Electronics and Instrumentation Engineering, vol. 148, no. 1, pp. 43–49, 2011.

    Google Scholar 

  26. Rajeev Sharma, Sujata Pandey and Shail Bala Jain, “Compact modeling and simulation of nanoscale fully depleted DG-SOI MOSFETS,” J. of Computational Electronics, vol. 10, no. 1–2, pp. 201–209, 2011.

    Google Scholar 

  27. E. J. Nowak, I. Aller, T. Ludwig, K. Kim, R. V. Joshi, C. T. Chuang, K. Bernstein, and R. Puri, “Turning Silicon on its edge,” IEEE Circuits Devices Mag., vol. 20, no. 1, Jan./Feb. 2004, pp. 20–31.

    Google Scholar 

  28. K. Kim and J. G. Fossum, “Double-gate CMOS: Symmetrical versus asymmetrical-gate devices,” IEEE Trans. on Electron Devices, vol. 48, no. 2, pp. 294–299, Feb. 2001.

    Google Scholar 

  29. Jente B. Kuang, Keunwoo Kim, Hung C. Ngo, Fadi H. Gebara, and Kevin J. Nowka, “Circuit techniques utilizing independent gate control in double-gate technologies,” IEEE Trans. on Very Large Scale Integration Systems, vol. 16, no. 12, pp. 1657–1665, Dec. 2008.

    Google Scholar 

  30. J. W. Han, C. J. Kim, and Y. K. Choi, “Universal potential model in tied and separated double-gate MOSFET with consideration of symmetric and separated asymmetric structure,” IEEE Trans. on Electron Devices, vol. 55, no. 6, pp. 1472–1479, June 2008.

    Google Scholar 

  31. S. M. Sze, Semiconductor Devices: Physics and Technology, 2nd Edition, Tata McGraw-Hill, India, 2004.

    Google Scholar 

  32. ‘A Product catalogue,’ READE Advances Materials, England, 2005.

    Google Scholar 

  33. C. Wang and J. Hwu, “Characterization of stacked Hafnium-oxide (HfO2) / Silicon-dioxide (SiO2) metal-oxide-semiconductor tunneling temperature sensors” J. of Electrochemical Society, vol. 157, no. 10, pp. 324–328, 2010.

    Google Scholar 

  34. M. Fadel, and O. Azim, “A study of some optical properties of hafnium dioxide (HfO2) thin films and their applications,” J. of Applied Physics Materials Science and Processing, vol. 66, no. 3, pp. 335–343, 1997.

    Google Scholar 

  35. Kaushik Roy, “Design of high performance sense amplifier using independent gate control in sub-50 nm double gate MOSFET,” Proc. of Int. Symp. on Quality Electronic Design, San Jose, CA, USA, 21–23 March 2005, pp. 490–495.

    Google Scholar 

  36. Oana Moldovan, Ferney A. Chaves, David Jimenez, Jean P. Raskin, and Benjamin Iniguez, “Accurate prediction of the volume inversion impact on undoped double-gate MOSFET capacitances,” Int. J. of Numerical Modeling: Electronic Networks, Devices and Fields, vol. 23, no. 6, pp. 447–457, Nov. 2010.

    Google Scholar 

  37. S. Sanayei and N. Aria, “Antenna selection in MIMO systems,” IEEE Communications Magazine, Oct. 2004, pp. 68–73.

    Google Scholar 

  38. Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Optimization of drain current and voltage characteristics for the DP4T double-gate RF CMOS switch at 45-nm technology,” Procedia Engineering, vol. 38, pp. 486–492, April 2012.

    Google Scholar 

  39. R. H. Caverly, S. Smith, and J. Hu, “RF CMOS cells for wireless applications,” J. of Analog Integrated Circuits and Signal Processing, vol. 25, no. 1, pp. 5–15, 2001.

    Google Scholar 

  40. Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Analysis of Double-Pole Four-Throw RF CMOS Switch with HfO2,” Proc. of Nat. Symp. on Microwave Processing of Materials, India, 28 Nov. 2010, p. 24.

    Google Scholar 

  41. D. Yamane, H. Seita, W. Sun, S. Kawasaki, H. Fujita, and H. Toshiyoshi, “A 12-GHz DPDT RF-MEMS switch with layer-wise waveguide/actuator design technique,” Proc. of 22 nd IEEE Conf. on Micro Electro Mechanical Systems, Sorrento, USA, 25–29 Jan 2009, pp. 888–891.

    Google Scholar 

  42. Giorgio Baccarani and Susanna Reggiani, “A compact double-gate MOSFET model comprising quantum-mechanical and nonstatic effects,” IEEE Trans. on Electron Devices, vol. 46, no. 8, pp. 1656–1666, Aug. 1999.

    Google Scholar 

  43. Hugues Nurray, patrik martin, and Serge Bardy, “Taylor expansion of surface potential in MOSFET: application to Pao-Sah integral,” Active and Passive Electronic Components, vol. 2010, pp. 1–11, 2010.

    Google Scholar 

  44. Hongyu He and Xueren Zheng, “Analytical model of undoped polycrystalline Silicon thin-film transistors consistent with Pao-Sah model,” IEEE Trans. on Electron Devices, vol. 58, no. 4, pp. 1102–1107, April 2011.

    Google Scholar 

  45. A. O. Conde, F. J. Sanchez, J. Muci, S. Malobabic, and J. Liou, “A review of core compact models for undoped double-gate SOI MOSFETs,” IEEE Trans. on Electron Devices, vol. 54, no. 1, pp. 131–140, Jan. 2007.

    Google Scholar 

  46. A. Tomkins, P. Garcia, and S. P. Voinigescu, “A 94 GHz SPST switch in 65 nm Bulk CMOS,” Proc. of Compound Semiconductor Integrated Circuits Symposium, CA, USA, 12–15 Oct. 2008, pp. 1–4.

    Google Scholar 

  47. Viktor Sverdlov, “Scaling, power consumption, and mobility enhancement techniques,” Computational Microelectronics, vol. 1, no. 1, pp. 5–22, 2011.

    Google Scholar 

  48. S. M. Sze, Semiconductor devices: physics and technology, 2nd Edition, Tata McGraw Hill, 2004.

    Google Scholar 

  49. Ashwani K. Rana, Narottam Chand and Vinod Kapoor, “Gate leakage behavior of source/drain-to-gate non-overlapped MOSFET structure,” J. of Computational Electronics, vol. 10, no. 1–2, pp. 222–228, June 2011.

    Google Scholar 

  50. Xing Zhou, Guojun Zhu, Guan Huei See, Karthik Chandrasekaran, and Siau Ben Chiah, “Unification of MOS compact models with the unified regional modeling approach,” J. of Computational Electronics, vol. 10, no. 1–2, pp. 121–135, 2011.

    Google Scholar 

  51. Hesham Hamed, Savas Kaya, Janusz and A. Starzyk, “Use of nano-scale double-gate MOSFETs in low-power tunable current mode analog circuits,” J. of Analog Integrated Circuits, Signal Processing, vol. 54, no. 3, pp. 211–217, 2008.

    Google Scholar 

  52. Shyam Parthasarathy, Amit Trivedi, Saurabh Sirohi, Robert Groves, Michael Olsen, Yogesh Chauhan, Michael Carroll, Dan Kerr, Ali Tombak, and Phil Mason, “RF SOI switch FET design and modeling tradeoffs for GSM applications,” Proc. of 23 rd Int. Con. on VLSI Design, India, 3–7 Jan. 2010, pp. 194–199.

    Google Scholar 

  53. M. Fragopoulou, S. Siskos, M. Manolopoulou, M. Zamani, and G. Sarrabayrouse, “Thermal neutron dosimetry using MOSFET dosemeters,” J. of Radiation Measurement, vol. 44, no. 9–10, pp. 1006–1008, Oct.-Nov. 2009.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

Copyright information

© 2014 Springer International Publishing Switzerland

About this chapter

Cite this chapter

Srivastava, V.M., Singh, G. (2014). Hafnium Dioxide-Based Double-Pole Four-Throw Double-Gate RF CMOS Switch. In: MOSFET Technologies for Double-Pole Four-Throw Radio-Frequency Switch. Analog Circuits and Signal Processing, vol 122. Springer, Cham. https://doi.org/10.1007/978-3-319-01165-3_6

Download citation

  • DOI: https://doi.org/10.1007/978-3-319-01165-3_6

  • Published:

  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-01164-6

  • Online ISBN: 978-3-319-01165-3

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics