Abstract
In this chapter, we have designed a double-pole four-throw radio-frequency switch using double-gate (DP4T DG RF) MOSFET to operate at 0.1 GHz to few GHz frequency range for the advanced wireless communication systems. This switch mitigates attenuation of passing signals and exhibits high isolation to avoid misleading of simultaneously received signals. The symmetric DG MOSFET has been the focus of much attention for the application of RF switch due to its ability of strength to short-channel effects and improved current driving capability as discussed in the previous chapters.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
M. Hunter, The basics of radio system design: how to design RF circuits? IEE Training Course, vol. 10, no. 1, p. 17, 2000.
K. T. Herring, J. W. Holloway, D. H. Staelin, and D. W. Bliss, “Path-loss characteristics of urban wireless channels,” IEEE Trans. on Antennas and Propagation, vol. 58, no. 1, pp. 171-177, Jan. 2010.
S. Chartier, P. Lohmiller, J. Dederer, H. Schumacher, and M. Oppermann, “SiGe BiCMOS wideband low noise amplifiers for application in digital beam-forming receivers,” Proc. European Microwave Conference, Paris, 28–30 Sept. 2010, pp.1070–1073.
Q. Jie, J. D. Cali, B. F. Dutton, G. J. Starr, D. Fa Foster, and C. E. Stroud, “Selective spectrum analysis for analog measurements,” IEEE Trans. on Industrial Electronics, vol. 58, no. 10, pp. 4960-4971, Oct. 201.1
Heng Zhang and Sanchez Sinencio, “Linearization techniques for CMOS low noise amplifiers: A tutorial,” IEEE Trans. on Circuits and Systems, vol. 58, no. 1, pp. 22-36, Jan. 2011.
M. Emam, P. Sakalas, D. Janvier, J. P. Raskin, L. T. Chuan, and F. Danneville, “Thermal noise in MOSFETs: A two- or a three-parameter noise model?,” IEEE Trans. on Electron Devices, vol. 57, no. 5, pp. 1188-1191, May 2010.
S. Ickhyun, Jeon Jongwook, Hee Sauk, Kim, Junsoo Park, Byung Gook, Jong Duk Lee, and Hyungcheol Shin, “A simple figure of merit of RF MOSFET for low-noise amplifier design,” IEEE Electron Device Letters, vol. 29, no. 12, pp. 1380–1382, Dec. 2008.
A. J. Lelis, D. Habersat, R. Green, A. Ogunniyi, M. Gurfinkel, J. Suehle, and N. Goldsman, “Time dependence of bias-stress-induced SiC MOSFET threshold-voltage instability measurements, “ IEEE Trans. on Electron Devices, vol. 55, no. 8, pp. 1835–1840, Aug. 2008.
Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF Switch,” Microelectronics Journal, vol. 42, no. 3, pp. 527–534, March 2011.
A. O. Adan, M. Koyanagi, and M. Fukumi, “Physical model of noise mechanisms in SOI and bulk-silicon MOSFETs for RF applications,” IEEE Trans. on Electron Devices, vol. 55, no. 3, pp. 872–880, March 2008
Etienne Sicard and Sonia Delmas Bendhia, Basics of CMOS Cell Design, 1st Edition, McGraw-Hill, USA, 2005.
Sungmo Kang and Yusuf Leblebichi, CMOS Digital Integrated Circuits Analysis and Design, 3rd Edition, McGraw-Hill, New York, USA, 2002.
A. M. Street, RF Switch Design, IEE Training Course, United Kingdom, vol. 4, pp. 1–7, April 2000.
Kwangchun Jung and K. O. Kenneth, “A CMOS single-pole four-throw switch,” IEEE Microwave and Wireless Components Letters, vol. 16, no. 3, pp. 128–130, March 2006.
Yuan Taur, Wei Chen, D. J. Frank, Shih Hsien Lo, and Hon Sum Wong, “CMOS scaling into the nanometer regime,” Proc. of IEEE, vol. 85, no. 4, pp. 486–504, Aug. 2002.
F. J. Huang and O. Kenneth, “A 0.5 μm CMOS T/R switch for 900 MHz wireless applications,” IEEE J. of Solid State Circuits, vol. 36, no. 3, pp. 486–492, March 2001.
Usha Gogineni, Hongmei Li, Jesus Alamo, and Susan Sweeney, “Effect of substrate contact shape and placement on RF characteristics of 45 nm low power CMOS devices,” Proc. of Radio Frequency Integrated Circuits Symp., Boston, MA, USA, 7–9 June 2009, pp. 163–166.
Chien Ta, Efstratios Skafidas, and Robin Evans, “A 60 GHz CMOS transmit/receive switch,” Proc. of IEEE Radio Frequency Integrated Circuits Symp., Honolulu, Hawaii, USA, 3–5 June 2007, pp. 725–728.
Behzad Razavi, “A 300 GHz fundamental oscillator in 65-nm CMOS technology,” IEEE J. of Solid State Circuits, vol. 46, no. 4, pp. 894–903, April 2011.
S. Chouksey and J. G. Fossum, “DICE: a beneficial short-channel effect in nanoscale double-gate MOSFETs,” IEEE Trans. on Electron Devices, vol. 55, no. 3, pp. 796–802, March 2008.
Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “DP4T RF CMOS switch: A better option to replace SPDT switch and DPDT switch,” Recent Patents on Electrical and Electronic Engineering, vol. 5, no. 3, pp. 244–248, Oct. 2012.
Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Analysis of Drain Current and Switching Speed for SPDT Switch and DPDT Switch with Proposed DP4T RF CMOS Switch,” J. of Circuits, Systems, and Computers, vol. 21, no. 4, pp. 1–18, June 2012.
Byung W. Min and Gabriel M. Rebeiz, “A 10 to 50 GHz CMOS distributed step attenuator with low loss and low phase imbalance,” IEEE J. of Solid State Circuits, vol. 42, no. 11, pp. 2547–2554, Nov. 2007.
Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Attenuation with double pole four throw CMOS switch design,” Proc. of IEEE Int. Conf. on Semiconductor Electronics, Malaysia, 28–30 June 2010, pp. 173–175,
K. Raczkowski, S. Thijs, W. De Raedt, B. Nauwelaers, and P. Wambacq, “50 to 67 GHz ESD protected power amplifiers in digital 45 nm LP CMOS,” Proc. of Int. Conf. on Solid State Circuits, San Francisco, California, USA, 8–12 Feb. 2009, pp. 382–384.
Usha Gogineni, Hongmei Li, Jesus Alamo, Susan Sweeney, and Basanth Jagannathan, “Effect of substrate contact shape and placement on RF characteristics of 45 nm low power CMOS devices,” IEEE J. of Solid State Circuits, vol. 45, no. 5, pp. 998–1006, May 2010.
A. Valdes Garcia, S. Reynolds, and J. O. Plouchart, “60 GHz transmitter circuits in 65 nm CMOS,” Proc. of Radio Frequency Integrated Circuits Symp., Atlanta, 15–17 June 2008, pp. 641–644.
Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “ Performance of double-pole four-throw double-gate RF CMOS Switch in 45 nm technology,” Int. J. of Wireless Engineering and Technology, vol. 1, no. 2, pp. 47–54, Oct. 2010.
S. H. Lee, C. S. Kim, and H. K. Yu, “A small signal RF model and its parameter extraction for substrate effects in RF MOSFETs,” IEEE Trans. on Electron Devices, vol. 48, no. 7, pp. 1374–1379, July 2001.
G. Chien, F. Weishi, Y. Hsu, and L. Tse, “A 2.4 GHz CMOS transceiver and baseband processor chipset for 802.11b wireless LAN application,” Proc. of IEEE Int. Conf. on Solid State Circuits, San Francisco, 9–13 Feb. 2003, pp. 358–359.
W. Kluge, L. Dathe, R. Jaehne, and D. Eggert, “A 2.4 GHz CMOS transceiver for 802.11b wireless LANs,” Proc. of IEEE Solid State Circuits Conf., San Francisco, California, USA, 9–13 Feb. 2003, pp. 360–361.
D. Su, M. Zargari, P. Yue, D. Weber, B. Kaczynski, and B. Wooley, “A 5 GHz CMOS transceiver for IEEE 802.11a wireless LAN systems,” IEEE J. of Solid State Circuits, vol. 37, no. 12, pp. 1688–1694, Dec. 2002.
D. Su, M. Zargari, P. Yue, D. Weber, B. Kaczynski, and B. Wooley, “A 5 GHz CMOS transceiver for IEEE 802.11a wireless LAN,” Proc. of IEEE Int. Conf. on Solid State Circuits, San Francisco, California, USA, 7 Feb. 2002, pp. 92–93.
S. Sharma and P. Kumar, “Non overlapped single and double gate SOI/GOI MOSFET for enhanced short channel immunity,” J. of Semiconductor Technology and Science, vol. 9, no. 3, pp. 136–147, Sept. 2009.
Thomas H. Lee, Planar Microwave Engineering: A Practical Guide to Theory, Measurement and Circuits, 2nd Edition, Cambridge University Press, India, 2006.
C. Y. Lin, “Design and implementation of configurable ESD protection cell for 60 GHz RF circuits in a 65 nm CMOS process,” Microelectronics Reliability, vol. 51, no. 8, pp. 1315–1324, Aug. 2011.
J. P. Carmo, P. M. Mendes, C. Couto, and J. H. Correia, “A 2.4 GHz RF CMOS transceiver for wireless sensor applications,” Proc. of Int. Conf. on Electrical Engineering, Coimbra, Portugal, 2005, pp. 902–905.
P. H. Woerlee, M. J. Knitel, and A. J. Scholten, “RF CMOS performance trends,” IEEE Trans. on Electron Devices, vol. 48, no. 8, pp. 1776–1782, Aug. 2001.
Viranjay M. Srivastava, K. S. Yadav, and G. Singh, “Analysis of double gate CMOS for double-pole four-throw RF switch design at 45-nm technology,” J. of Computational Electronics, vol. 10, no. 1–2, pp. 229–240, June 2011.
Y. Cheng and M. Matloubian, “Parameter extraction of accurate and scaleable substrate resistance components in RF MOSFETs,” IEEE Electron Device Letters, vol. 23, no. 4, pp. 221–223, April 2002.
Li Zhiyuan, Ma Jianguo, Ye Yizheng, and Yu Mingyan, “Compact channel noise models for deep-submicron MOSFETs,” IEEE Trans. on Electron Devices, vol. 56, no. 6, pp. 1300–1308, June 2009.
A. Poh and Z. Ping, “Design and analysis of transmit/receive switch in triple-well CMOS for MIMO wireless systems,” IEEE Trans. on Microwave Theory and Techniques, vol. 55, no. 3, pp. 458–466, March 2007.
S. Solda, M. Caruso, A. Bevilacqua, A. Gerosa, D. Vogri, and A. Neviani, “A 5 Mbps UWB-IR transceiver front-end for wireless sensor networks in 0.13 μm CMOS,” IEEE J. of Solid State Circuits, vol. 46, no. 7, pp. 1636–1647, July 2011.
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2014 Springer International Publishing Switzerland
About this chapter
Cite this chapter
Srivastava, V.M., Singh, G. (2014). Double-Pole Four-Throw RF Switch Based on Double-Gate MOSFET. In: MOSFET Technologies for Double-Pole Four-Throw Radio-Frequency Switch. Analog Circuits and Signal Processing, vol 122. Springer, Cham. https://doi.org/10.1007/978-3-319-01165-3_4
Download citation
DOI: https://doi.org/10.1007/978-3-319-01165-3_4
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-319-01164-6
Online ISBN: 978-3-319-01165-3
eBook Packages: EngineeringEngineering (R0)