Abstract
This paper reports a novel L-shaped Impact-ionization MOS (LI-MOS) transistor structure that achieves a subthreshold swing of well below 60 mV/decade at room temperature and operates at a low supply voltage. The device features an L-shaped or elevated Impact-ionization region (I-region) which displaces the hot carrier activity away from the gate dielectric region to improve hot carrier reliability and VT stability problems. Device physics and design principles for the LI-MOS transistor are detailed through extensive two-dimensional device simulations. The LI-MOS transistor exhibits excellent scalability, making it suitable for augmenting the performance of standard CMOS transistors in future technology generations.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
K. Gopalakrishnan et al., IEDM Tech. Dig., pp. 289–292, 2002.
E.-H. Toh et al., IEDM Tech. Dig., pp. 971–974, 2005.
S. Selberherr, Springer-Verlag, 1984, ISBN 03878006.
B. J. Baliga, J. Wiley, pp. 407–419, 1987, ISBN 0471819867.
ITRS 2006, http://www.itrs.net/
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2007 Springer-Verlag Wien
About this paper
Cite this paper
Toh, EH., Wang, G.H., Chan, L., Samudra, G., Yeo, YC. (2007). Device Design and Scalability of an Impact Ionization MOS Transistor with an Elevated Impact Ionization Region. In: Grasser, T., Selberherr, S. (eds) Simulation of Semiconductor Processes and Devices 2007. Springer, Vienna. https://doi.org/10.1007/978-3-211-72861-1_31
Download citation
DOI: https://doi.org/10.1007/978-3-211-72861-1_31
Publisher Name: Springer, Vienna
Print ISBN: 978-3-211-72860-4
Online ISBN: 978-3-211-72861-1
eBook Packages: EngineeringEngineering (R0)