Abstract
Already today, self-heating of semiconductor devices is an important aspect in electrical network design. Especially for SOI circuits, the influence of thermal aspects on the overall behavior cannot be longer neglected. Inspecting a simple but instructive example, we propose an alternative modeling ansatz to the common discrete thermal network approach. Our discussion concentrates on the interplay between different types of models, in particular coupling of differing spatial dimensions, and the associated spatial discretizalion of thermally and electrically active structures.
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Bartel, A., Günther, M., Schulz, M. (2003). Modeling and Discretization of a Thermal-Electric Test Circuit. In: Antreich, K., Bulirsch, R., Gilg, A., Rentrop, P. (eds) Modeling, Simulation, and Optimization of Integrated Circuits. ISNM International Series of Numerical Mathematics, vol 146. Birkhäuser, Basel. https://doi.org/10.1007/978-3-0348-8065-7_12
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DOI: https://doi.org/10.1007/978-3-0348-8065-7_12
Publisher Name: Birkhäuser, Basel
Print ISBN: 978-3-0348-9426-5
Online ISBN: 978-3-0348-8065-7
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