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An Area-Efficient FPGA Implementation of a Real-Time Binary Object Detection System

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Advances in Networked-Based Information Systems (NBiS 2020)

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 1264))

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Abstract

While object detection is one of the most computationally complex tasks, it can only utilize limited hardware resources on embedded devices. At the same time, additional demanding constraints such as reliable detection accuracy, high-throughput performance, power-efficiency, and real-time response are required. The goal of this work is to enhance the detection accuracy performance of a low-resource embedded object detection system to meet real-time requirements for different applications. The proposed binary object detection system achieves considerable reduction in hardware resources and significant simplification in FPGA implementation.

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Authors and Affiliations

  1. University of Victoria, Victoria, BC, Canada

    Narges Attarmoghaddam & Kin Fun Li

Authors
  1. Narges Attarmoghaddam
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  2. Kin Fun Li
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Corresponding author

Correspondence to Kin Fun Li .

Editor information

Editors and Affiliations

  1. Department of Information and Communication Engineering, Faculty of Information Engineering, Fukuoka Institute of Technology, Fukuoka, Japan

    Leonard Barolli

  2. Department of Electrical and Computer Engineering, University of Victoria, Victoria, BC, Canada

    Kin Fun Li

  3. Faculty of Business Administration, Rissho University, Tokyo, Japan

    Tomoya Enokido

  4. Department of Advanced Sciences, Hosei University, Tokyo, Japan

    Makoto Takizawa

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Attarmoghaddam, N., Li, K.F. (2021). An Area-Efficient FPGA Implementation of a Real-Time Binary Object Detection System. In: Barolli, L., Li, K., Enokido, T., Takizawa, M. (eds) Advances in Networked-Based Information Systems. NBiS 2020. Advances in Intelligent Systems and Computing, vol 1264. Springer, Cham. https://doi.org/10.1007/978-3-030-57811-4_13

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