Abstract
This chapter presents a short overview of AIDA-C flow. Also, changes related to the implementation of the new MC-based yield estimation methodology, which led to the new AIDA-C Variation-Aware version tool, are detailed. AIDA-C is an analog circuit sizing simulation-based, multi-objective, and multi-constraint optimization tool. As a simulation-based optimization tool, AIDA-C evaluates potential solutions using an electrical simulator. Among the different circuit simulators supported by the evaluation module are commercial simulators, such as Cadence® Spectre®, Mentor Graphics’ ELDO™, or Synopsys® HSPICE®, and open-source simulators like the NGSpice circuit simulator.
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References
N. Lourenço, R. Martins, N. Horta, Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects (Springer International Publishing, Cham, 2017)
N. Lourenço, R. Martins, A. Canelas, R. Póvoa, N. Horta, AIDA: layout-aware analog circuit-level sizing with in-loop layout generation. Integration VLSI J. 55, 316–329 (2016)
R. Martins, N. Lourenço, N. Horta, Analog Integrated Circuit Design Automation – Placement, Routing and Parasitic Extraction Techniques (Springer International Publishing, Cham, 2017)
Mentor, A Siemens Business. [Online]. Available: http://www.mentor.com. Accessed 10 Sept 2017
C. McAndrew, I.-S. Lim, B. Braswell, D. Garrity, Corner models: inaccurate at best, and it only gets worst…, in Proc. IEEE Custom Integr. Circuits Conf., 2013
S. Bandyopadhyay, S. Saha, Some single- and multiobjective optimization techniques, in Unsupervised Classification: Similarity Measures, Classical and Metaheuristic Approaches, and Applications, (Springer, Berlin, 2013), pp. 17–55
M. Reyes-sierra, C.A.C. Coello, Multi-objective particle swarm optimizers: a survey of the state-of-the-art. Int. J. Comput. Intell. Res. 2(3), 287–308 (2006)
R. Lourenço, N. Lourenço, N. Horta, AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing (Springer International Publishing, Cham, 2015)
A. Canelas, R. Martins, R. Póvoa, N. Lourenço, J. Guilherme, N. Horta, Enhancing an automatic analog IC design flow by using a technology-independent module generator, in Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, (IGI-Global, Hershey, PA, 2014), pp. 102–133
E. Maricau, G. Gielen, Analog IC Reliability in Nanometer CMOS (Springer-Verlag, New York, 2013)
M. Aslam, Statistical monitoring of process capability index having one sided specification under repetitive sampling using an exact distribution. IEEE Access 6, 25270–25276 (2018)
Y.T. Tai, W.L. Pearn, Measuring the manufacturing yield for skewed wire bonding processes. IEEE Trans. Semicond. Manuf. 28(3), 424–430 (2015)
G. Moretti, Senior Editor Chip Design Magazine, Complexity of Mixed-signal Designs, 28 Aug 2014. [Online]. Available: http://chipdesignmag.com/sld/blog/2014/08/28/complexity-of-mixed-signal-designs/. Accessed 16 Sept 2018
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Canelas, A.M.L., Guilherme, J.M.C., Horta, N.C.G. (2020). AIDA-C Variation-Aware Circuit Synthesis Tool. In: Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies. Springer, Cham. https://doi.org/10.1007/978-3-030-41536-5_5
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DOI: https://doi.org/10.1007/978-3-030-41536-5_5
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