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Structural Decomposition in FSM Synthesis

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Logic Synthesis for FPGA-Based Control Units

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 636))

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Abstract

The chapter deals with analysis of methods of structural decomposition. Main idea of these methods is reduced to diminishing the numbers of literals in systems of Boolean functions due to increasing the number of logic levels in FSM circuits. Methods of state assignment are analysed. Next, the basic features of field programmable gate arrays are discussed. It is shown that embedded memory blocks allow implementing systems of regular Boolean functions. The modern design flow targeting FPGA-based projects is analysed. Different methods of structural decomposition are considered such as the replacement of logical conditions, encoding of the collections of microoperations, encoding of the fields of compatible microoperations and verticalization of initial GSA. The methods basing of classes of pseudoequivalent states are discussed for Moore FSM. The FPGA-based structural diagrams of FSM circuits based on structural decomposition are shown.

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Authors and Affiliations

  1. Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, Zielona Góra, Poland

    Alexander Barkalov, Larysa Titarenko & Kamil Mielcarek

  2. Vasyl Stus’ Donetsk National University (in Vinnytsia), Vinnytsia, Ukraine

    Alexander Barkalov

  3. Department of Infocommunications, Kharkov National University of Radio Electronics, Kharkiv, Ukraine

    Larysa Titarenko

  4. Institute of Science and Technology Automatics and Robotics, Metallurgy, State Higher Vocational School (PWSZ), Głogów, Poland

    Sławomir Chmielewski

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Barkalov, A., Titarenko, L., Mielcarek, K., Chmielewski, S. (2020). Structural Decomposition in FSM Synthesis. In: Logic Synthesis for FPGA-Based Control Units. Lecture Notes in Electrical Engineering, vol 636. Springer, Cham. https://doi.org/10.1007/978-3-030-38295-7_2

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