Skip to main content

FSM-Based Models of Control Units

  • Chapter
  • First Online:
Logic Synthesis for FPGA-Based Control Units

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 636))

Abstract

The chapter provides some basic information. It is shown that control algorithms could be implemented using either microprogram control units or finite state machines. The language of GSA is introduced. Next, the connections are shown with GSAs and state transition graphs of Mealy, Moore and combined FSMs. Classical principles are discussed for logic synthesis of Mealy and Moore FSMs. The FSM logic circuits are implemented with using system gates. The methods of preliminary assessment of hardware amounts are discussed in the last part of the chapter.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. Adamski M, Barkalov A (2006) Architectural and sequential synthesis of digital devices. University of Zielona Góra Press

    Google Scholar 

  2. Adamski M, Barkalov A,  Bukowiec A (2005) Structures of mealy FSM logic circuits under implementation of verticalized flow-chart. In: Proceedings of the IEEE east-west design and test workshop (EWDTW’05), Kharkov, 2005. Kharkov National University of Radioelectronics, pp 70–74

    Google Scholar 

  3. Agerwala T (1976) Microprogram optimization: a survey. IEEE Trans Comput 25(10):962–973

    Article  MathSciNet  Google Scholar 

  4. Agrawala A, Rauscher T (1976) Foundations of microprogramming. Academic Press, New York

    Google Scholar 

  5. Altera. http://www.altera.com. Accessed Jan 2019

  6. Amann R, Baitinger U (1989) Optimal state chains and states codes in finite state machines. IEEE Trans Comput-Aided Des 8(2):153–170

    Article  Google Scholar 

  7. Anceau F (1986) The architecture of microprocessors. Addison-Wesley, Workingham

    Google Scholar 

  8. Asahar P, Devidas S, Newton A (1992) Sequential logic synthesis. Kluwer Academic Publishers, Boston

    Book  Google Scholar 

  9. Atmel. http://www.atmel.com. Accessed Jan 2019

  10. Bacchetta P,  Daldos L,  Sciuto D, Silvano C (2000) Low-power state assignment techniques for finite state machines. In Proceedings of the 2000 IEEE international symposium on circuits and systems (ISCAS’2000), vol 2. IEEE, Geneva, pp 641–644

    Google Scholar 

  11. Baranov S (1994) Logic synthesis of control automata. Kluwer Academic Publishers, Boston

    Google Scholar 

  12. Baranov S (2008) Logic and system design of digital systems. TUT Press, Tallinn

    Google Scholar 

  13. Barkalov A (1983) Microprogram control unit as composition of automate with programmable and hardwired logic. Autom Comput Sci 17(4):36–41

    MathSciNet  Google Scholar 

  14. Barkalov A (1995) Multilevel PLA schemes for microprogram automata. Cybern Syst Anal 31(4):489–495

    Article  Google Scholar 

  15. Barkalov A (1998) Principles of logic optimization for Moore microprogram automaton. Cybern Syst Anal 34(1):54–60

    Article  Google Scholar 

  16. Barkalov A, Barkalov A Jr (2004) Synthesis of finite-state machines with transformation of the object’s codes. In Proceedings of the international conference TCSET’2004, Lviv, Ukraina. Lviv Polytechnic National University. Publishing House of Lviv Polytechnic, Lviv, pp 61–64

    Google Scholar 

  17. Barkalov A, Barkalov A Jr (2005) Design of mealy finite-state machines with the transformation of object codes. Int J Appl Math Comput Sci 15(1):151–158

    MathSciNet  MATH  Google Scholar 

  18. Barkalov A, Beleckij O, Nedal A (1999) Applying of optimization methods of Moore automaton for synthesis of compositional microprogram control unit. Autom Control Comput Sci 33(1):44–52

    Google Scholar 

  19. Barkalov A, Bukowiec A (2005) Synthesis of mealy finite-states machines for interpretation of verticalized flow-charts. Theor Appl Inform 5(5):39–51

    Google Scholar 

  20. Barkalov A, Dzhaliashvili Z, Salomatin V, Starodubov K (1986) Optimization of a microinstruction address scheme for microprogram control unit with PLA and PROM. Autom Control Comput Sci 20(5):83–87

    Google Scholar 

  21. Barkalov A, Salomatin V, Starodubov K, Das K (1991) Optimization of Mealy automaton logic using programmable logic arrays. Cybern Syst Anal 27(5):789–793

    Article  Google Scholar 

  22. Barkalov A, Shwec A (1994) Synthesis of compositional microprogram control unit with modified microinstruction addressing. Autom Control Comput Sci 28(5):22–30

    Google Scholar 

  23. Barkalov A, Shwec A (1995) Synthesis of compositional microprogram control unit with a code transformer. Autom Comput Sci 29(6):16–24

    Google Scholar 

  24. Barkalov A, Titarenko L (2007) Design of control units with programmable logic devices. In: Korbicz J (ed) Measurements. methods, systems and design. Wydawnictwo Komunikacji i Łączności, Warsaw, pp 371–391

    Google Scholar 

  25. Barkalov A, Titarenko L, Chmielewski S (2007) Optimization of logic circuit of Moore FSM on CPLD. Pomiary Autom Kontrola 53(5):18–20

    Google Scholar 

  26. Barkalov A, Titarenko L, Kołopeńczyk M (2006) Optimization of control unit with code sharing. In: Proceedings of the 3rd international workshop of IFAC discrete–event system design (DESDES’06). University of Zielona Góra Press, Rydzyna, pp 195–200

    Article  Google Scholar 

  27. Barkalov A,  Titarenko L, Kołopeńczyk M (2006) Optimization of control unit with code sharing. In: Proceedings of the IEEE east-west design and test workshop (EWDTW’06), Sochi, Kharkov, 2006. Kharkov National University of Radioelectronics, pp 171–174

    Google Scholar 

  28. Barkalov A, Titarenko L, Kołopeńczyk M (2007) Optimization of control memory size of control unit with codes sharing. In: Proceedings of the IXth international conference CADSM 2007 “The experience of designing and application of CAD systems in microelectronics”. Lviv–Polana, Ukraine, pp 242–245

    Google Scholar 

  29. Barkalov A, Titarenko L, Wiśniewski R (2006) Optimization of address circuit of compositional microprogram unit. In: Proceedings of the IEEE east-west design and test workshop (EWDTW’06), Sochi, Kharkov, 2006. Kharkov National University of Radioelectronics, pp 167–170

    Google Scholar 

  30. Barkalov A, Titarenko L, Wiśniewski R (2006) Synthesis of compositional microprogram control units with sharing codes ADN address decoder. In Proceedings of the international conference mixed design of integrated circuits and systems – MIXDES 2006. Łódz, pp 397–400

    Google Scholar 

  31. Barkalov A, Węgrzyn M (2006) Design of control units with programmable logic. University of Zielona Góra Press

    Google Scholar 

  32. Barkalov A, Węgrzyn M, Wiśniewski R (2006) Partial reconfiguration of compositional microprogram control units implemented on FPGAs. In: Proceedings of IFAC workshop on programmable devices and embedded systems (Brno), pp 116–119

    Article  Google Scholar 

  33. Barkalov A, Wiśniewski R (2004) Design of compositional microprogram control units with maximal encoding of inputs. Radioelectron Inform 3:79–81

    Google Scholar 

  34. Barkalov A, Wiśniewski R (2004) Optimization of compositional microprogram control unit with elementary operational linear chains. Control Syst Comput 5:25–29

    Google Scholar 

  35. Barkalov A, Wiśniewski R (2004) Optimization of compositional microprogram control units with sharing of codes. In: Proceedings of the fifth international conference CADD’DD 04, vol 1, Minsk, Belorus, 2004. United Institute of the Problems of Informatics, Minsk, pp 16–22

    Google Scholar 

  36. Barkalov A, Wiśniewski R (2005) Optimization of compositional microprogram control units implemented on system-on-chip. Theor Appl Inform 9:7–22

    Google Scholar 

  37. Barkalov A, Zelenjova I (2000) Optimization of replacement of logical conditions for an automaton with bidirectional transitions. Autom Control Comput Sci 34(5):48–53, Allerton Press Inc

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Alexander Barkalov .

Rights and permissions

Reprints and permissions

Copyright information

© 2020 Springer Nature Switzerland AG

About this chapter

Check for updates. Verify currency and authenticity via CrossMark

Cite this chapter

Barkalov, A., Titarenko, L., Mielcarek, K., Chmielewski, S. (2020). FSM-Based Models of Control Units. In: Logic Synthesis for FPGA-Based Control Units. Lecture Notes in Electrical Engineering, vol 636. Springer, Cham. https://doi.org/10.1007/978-3-030-38295-7_1

Download citation

Publish with us

Policies and ethics