Abstract
The general approach for designing combinational logic circuits is illustrated with an example. Logic functions are the output of the design of combinational circuits and they should be simplified before implementation. Algebraic method, Karnaugh mapping and Quine-McCluskey methods for simplifying logic functions are explained and illustrated with examples. Hazards usually exist with the implementation of logic functions. The types of hazards and compensating circuits to eliminate the hazards are explained.
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References
Doran R (2007) The gray code. J Univ Comput Science 13(11):1573–1597
Givone D (2003) Digital principles and design. McGraw-Hill Higher Education
Shum W, Anderson J (2007) FPGA glitch power analysis and reduction. In: ACM international symposium on low power electronics and design, IEEE
Flynn M, Mitra S (2017) Edward J. McCluskey 1929–2016. IEEE Des Test
He J, Turner KJ (2001) Specifying hardware timing with ET-LOTOS. In: Proceedings of 11th conference on Correct Hardware Design and Verification Methods (CHARME 2001), Lecture notes in computer science, vol 2144. Springer, pp 161–166
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Natarajan, D. (2020). Combinational Logic Minimization. In: Fundamentals of Digital Electronics. Lecture Notes in Electrical Engineering, vol 623. Springer, Cham. https://doi.org/10.1007/978-3-030-36196-9_3
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DOI: https://doi.org/10.1007/978-3-030-36196-9_3
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