Abstract
Programmable Logic Devices (PLDs) use combinational and sequential logic circuits as applicable to program logic functions. The operation of Read Only Memory (ROM), Mask ROM, Programmable ROM, Programmable Logic Array (PLA), Programmable Array Logic (PAL), Generic Array Logic (GAL), Complex Programmable Logic Device (CPLD) and Field Programmable Gate Array (FPGA) devices are presented. Applications of the devices are also presented.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Finn CL (1972) All semiconductor memory system includes read-only and read/write chips. HP J 22–24
Ahsan K, Shah H, Kingston P (2010) RFID applications: an introductory and exploratory study. IJCSI Int J Comput Sci Issues 7(1):3
Farooq U et al (2012) Tree-based heterogeneous FPGA architectures. Springer
CPLDs versus FPGAs, comparing high-capacity programmable logic, product information bulletin, vol 18. Altera Corporation, Feb 1995
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2020 Springer Nature Switzerland AG
About this chapter
Cite this chapter
Natarajan, D. (2020). Programmable Logic Devices. In: Fundamentals of Digital Electronics. Lecture Notes in Electrical Engineering, vol 623. Springer, Cham. https://doi.org/10.1007/978-3-030-36196-9_12
Download citation
DOI: https://doi.org/10.1007/978-3-030-36196-9_12
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-36195-2
Online ISBN: 978-3-030-36196-9
eBook Packages: EngineeringEngineering (R0)