Performance Improvement of Multimedia Kernels Using Data- and Thread- Level Parallelism on CPU Platform

Abstract

Processor vendors have been expanding Single Instruction Multiple Data (SIMD) extensions in their General Purpose Processors (GPPs). These extensions have their own instruction set architecture and equipped with Special Purpose Instructions (SPIs) to exploit Data Level Parallelism (DLP). In addition, to these extensions, GPPs have been equipped with multicore technologies so that each processor has multicore to process program using exploiting Thread-level Parallelism (TLP). In order to exploit these technologies, SIMD and multicore, many parallel programming models such as Intrinsic Programming Model (IPM), and Compiler’s Automatic Vectorization (CAV) and OpenMP have been proposed. Increasing performance using DLP depends on the number of data that can be processed in parallel using SIMD instructions. While performance improvement using TLP depends on the number of cores and program dependencies. In order to increase the performance of multimedia kernels, we exploit both DLP and TLP using parallel programming models such as IPM, CAVs, and OpenMP in this paper. Our experimental results show that the combination of DLP and TLP can improve performance significantly compared to each DLP and TLP individually. In addition, various compilers such as ICC, GCC, and LLVM are evaluated in terms of automatic vectorization. The obtained results show that ICC and GCC compilers have more ability to vectorize the kernels in comparison with LLVM compiler. In addition, despite the higher efficiency of IPM than CAVs, it is tedious and error-prone, and more attention is needed to develop and to extend auto-vectorization.