Abstract
This chapter describes an automated approach to identify untrustworthy components and localize malicious functional modifications. The technique is based on extracting polynomials from gate-level implementation of the untrustworthy component and comparing them with specification polynomials. The proposed approach is applicable when the specification is available. This approach is scalable due to manipulation of polynomials instead of BDD-based analysis used in traditional equivalence checking techniques. Experimental results using Trust-HUB benchmarks demonstrate significant improvement in both localization and test generation efficiency compared to the state-of-the-art Trojan detection techniques.
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References
J. Aarestad, D. Acharyya, R. Rad, J. Plusquellic, Detecting Trojans through leakage current analysis using multiple supply pad I ddqs, in IEEE Transactions on Information Forensics and Security (IEEE, New York, 2010), pp. 893–904
B. Çakir, S. Malik, Hardware Trojan detection for gate-level ICS using signal correlation based clustering, in Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (EDA Consortium, San Jose, 2015), pp. 471–476
R.S. Chakraborty, F. Wolf, C. Papachristou, S. Bhunia, MERO: a statistical approach for hardware Trojan detection, in International Workshop on Cryptographic Hardware and Embedded Systems (CHES’09) (Springer, Berlin, 2009), pp. 369–410
Formality, User Guide (2007). http://www.vlsiip.com/formality/ug.pdf
X. Guo, R.G. Dutta, Y. Jin, F. Farahmandi, P. Mishra, Pre-silicon security verification and validation: a formal perspective, in ACM/IEEE Design Automation Conference (DAC) (ACM, New York, 2015)
M. Hicks, M. Finnicum, S. King, M. Martin, J. Smith, Overcoming an untrusted computing base: Detecting and removing malicious hardware automatically, in IEEE Symposium on Security and Privacy (SP) (IEEE Computer Society, Los Alamitos, 2010), pp. 159–172
Y. Huang, S. Bhunia, P. Mishra, MERS: Statistical test generation for side-channel analysis based Trojan detection, in Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security (ACM, New York, 2016), pp. 130–141
Y. Huang, S. Bhunia, P. Mishra, Scalable test generation for Trojan detection using side channel analysis. IEEE Trans. Inf. Forensics Secur. 13(11), 2746–2760 (2018)
Y. Jin, Y. Makris, Hardware Trojan detection using path delay fingerprint, in Hardware-Oriented Security and Trust (HOST) (IEEE, Piscataway, 2008), pp. 51–57
Y. Lyu, P. Mishra, A survey of side channel attacks on caches and countermeasures. Springer J. Hardw. Syst. Secur. (HASS) 2(1), 33–50 (2018)
Y. Lyu, P. Mishra, Efficient test generation for Trojan detection using side channel analysis, in Design automation and test in Europe (DATE) (IEEE, Piscataway, 2019)
S. Narasimhan, X. Wang, D. Du, R. Chakraborty, S. Bhunia, TeSR: a robust temporal self-referencing approach for hardware Trojan detection, in Hardware-Oriented Security and Trust (HOST) (IEEE, Piscataway, 2011), pp. 71–74
M. Oya, Y. Shi, M. Yanagisawa, N. Togawa, A score-based classification method for identifying hardware-trojans at gate-level netlists, in Design Automation and Test in Europe(DATE) (Association for Computing Machinery, New York, 2015), pp. 465–470
A. Sayed-Ahmed, D. Gro, M. Soeken, R. Drechsler, et al., Formal verification of integer multipliers by combining gröbner basis with logic reduction, in 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) (IEEE, Piscataway, 2016), pp. 1048–1053
C. Sturton, M. Hicks, D. Wagner, S. King, Defeating UCI: Building stealthy and malicious hardware, in IEEE Symposium on Security and Privacy (SP) (IEEE Computer Society, Los Alamitos, 2011), pp. 64–77
Synopsys, Formality (2015). http://www.synopsys.com/Tools/Verification/FormalEquivalence/Pages/Formality.aspx
Synopsys, Tetramax ATPG. http://www.synopsys.com/Tools/Implementation/RTLSynthesis/Test/Pages/TetraMAXATPG.aspx
Trust-HUB. https://www.trust-hub.org/
A. Waksman, M. Suozzo, S. Sethumadhavan, FANCI: identification of stealthy malicious logic using Boolean functional analysis, in ACM SIGSAC Conference on Computer & Communications Security (ACM, New York, 2013), pp. 697–708
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Farahmandi, F., Huang, Y., Mishra, P. (2020). Trojan Localization Using Symbolic Algebra. In: System-on-Chip Security. Springer, Cham. https://doi.org/10.1007/978-3-030-30596-3_5
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DOI: https://doi.org/10.1007/978-3-030-30596-3_5
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