Abstract
Modern-day High Performance Computing (HPC) trends are shifting towards exascale performance figures in order to satisfy the needs of many compute-intensive and power-hungry applications. Hence, the European-funded ECOSCALE project introduces a highly innovative architecture, which spreads the workload among a number of independent and concurrently-operating conventional (CPU) as well as reconfigurable (FPGA) processing elements that execute OpenCL cores whilst significantly minimizing the need for data transfers. The accelerator cores implemented on the ECOSCALE platform correspond to the project use cases and have been the source of a meticulous exploration process for optimal performance results such as execution time. This paper focuses on performance and power optimizations of the Michelsen algorithm. This algorithm is an efficient calculator of the Rachford-Rice equation, which is extensively used in the field of oil Reservoir Simulation (RS). The algorithm was first optimized manually through Vivado HLS and, subsequently, using a Design Space Exploration (DSE) tool we developed in [1]. Here we present up-to-date optimization results based on the latest FPGA ECOSCALE platform in order to reveal bottlenecks, saturation points and design alternatives. The measurements are performed on real data and the evaluation results register significant gains in calculation times over conventional CPU platforms; an achievement that carries added value considering the significantly reduced power consumption costs commonly associated with reconfigurable hardware.
This work is supported by the European Commission under the H2020 Programme and the ECOSCALE project (grant agreement 671632).
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Malakonakis, P., Georgopoulos, K., Ioannou, A., Lavagno, L., Papaefstathiou, I., Mavroidis, I.: HLS algorithmic explorations for HPC execution on reconfigurable hardware - ECOSCALE. In: Voros, N., Huebner, M., Keramidas, G., Goehringer, D., Antonopoulos, C., Diniz, P.C. (eds.) ARC 2018. LNCS, vol. 10824, pp. 724–736. Springer, Cham (2018). https://doi.org/10.1007/978-3-319-78890-6_58
Mavroidis, I., et al.: ECOSCALE: reconfigurable computing and runtime system for future exascale systems. In: 2016 Design, Automation and Test in Europe Conference and Exhibition, Dresden, Germany, 14–18 March 2016, pp. 696–701 (2016)
ECOSCALE Web-Site. http://www.ecoscale.eu/
Coussy, P., Morawiec, A.: High-Level Synthesis: From Algorithm to Digital Circuit, 1st edn. Springer, Heidelberg (2008). https://doi.org/10.1007/978-1-4020-8588-8. ISBN 1402085877, 9781402085871
Whitson, C., Michelsen, M.: The negative flash. J. Fluid Phase Equilib. 35, 51–71 (1989)
Abramowitz, M.: Handbook of Mathematical Functions, With Formulas, Graphs, and Mathematical Tables. Dover Publications (1974). ISBN 0486612724
Escobar, F.A., et al.: Suitability analysis of FPGAs for heterogeneous platforms in HPC. IEEE Trans. Parallel Distrib. Syst. J. 27(2), 600–612 (2016)
Blott, M.: Reconfigurable future for HPC. In: International Conference on High Performance Computing Simulation (HPCS), pp. 130–131, July 2016
Cilardo, A.: HtComp: bringing reconfigurable hardware to future high-performance applications. IJHPCN J. 12(1), 74–83 (2018)
Kobayashi, R., et al.: OpenCL-ready high speed FPGA network for reconfigurable high performance computing. In: International Conference on High Performance Computing in Asia-Pacific Region, HPC Asia 2018, Tokyo, pp. 192–201, 28–31 January 2018
Putnam, A., et al.: A reconfigurable fabric for accelerating large-scale datacenter services. Commun. ACM 59(11), 114–122 (2016)
El-Araby, E., et al.: Virtualizing and sharing reconfigurable resources in high-performance reconfigurable computing systems. In: Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications, Austin, TX, pp. 1–8 (2008)
Plessl, C.: Bringing FPGAs to HPC production systems and codes. In: Fourth International Workshop on Heterogeneous High-performance Reconfigurable Computing, workshop at Supercomputing (2018)
Ouyang, J., et al.: SDA: software-defined accelerator for large-scale DNN systems. In: IEEE Hot Chips 26 Symposium (HCS), Cupertino, CA, pp. 1–23 (2014)
Brech, B., et al.: Data engine for NoSQL - IBM power systems edition. White Paper, 2015
Chen, Z., Liu, H., Yu, S., Hsieh, B., Shao, L.: GPU-based parallel reservoir simulators. In: Erhel, J., Gander, M.J., Halpern, L., Pichot, G., Sassi, T., Widlund, O. (eds.) Domain Decomposition Methods in Science and Engineering XXI. LNCSE, vol. 98, pp. 199–206. Springer, Cham (2014). https://doi.org/10.1007/978-3-319-05789-7_16
Zaza, A., et al.: A CUDA based parallel multi-phase oil reservoir simulator. Comput. Phys. Commun. 206, 2–16 (2016)
Klie, H.M., Sudan, H.H., Li, R., Saad, Y.: Exploiting capabilities of many core platforms in reservoir simulation. In: SPE Reservoir Simulation Symposium. Society of Petroleum Engineers, January 2011
Esler, K., et al.: Realizing the potential of GPUs for reservoir simulation. In: ECMOR XIV-14th European Conference on the Mathematics of Oil Recovery, September 2014
Yu, S., et al.: GPU-based parallel reservoir simulation for large-scale simulation problems. In: SPE Europec/EAGE Annual Conference. Society of Petroleum Engineers, January 2012
Bayat, M., Killough, J.E.: An experimental study of GPU acceleration for reservoir simulation. In: SPE Reservoir Simulation Symposium. Society of Petroleum Engineers, February 2013
Barros, A., et al.: Performance evaluation model based on precision reduction and FPGAs applied to seismic modeling. In: Simpósio em Sistemas Computacionais, October 2011
Medeiros, V., Barros, A., Silva-Filho, A., de Lima, M.E.: High performance implementation of RTM seismic modeling on FPGAs: architecture, arithmetic and power issues. In: Vanderbauwhede, W., Benkrid, K. (eds.) High-Performance Computing Using FPGAs, pp. 305–334. Springer, New York (2013). https://doi.org/10.1007/978-1-4614-1791-0_10
Katevenis, M., et al.: The ExaNeSt project: interconnects, storage, and packaging for exascale systems. In: Euromicro Conference on Digital System Design (DSD), Limassol, pp. 60–67 (2016)
Rigo, A., et al.: Paving the way towards a highly energy-efficient and highly integrated compute node for the exascale revolution: the ExaNoDe approach. In: Euromicro Conference on Digital System Design, Vienna, pp. 486–493 (2017)
Durand, Y., et al.: EUROSERVER: energy efficient node for European micro-servers. In: 17th Euromicro Conference on Digital System Design, Verona (2014)
Vivado Design Suite User Guide v2017.4, Xilinx Inc. http://www.xilinx.com/
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Switzerland AG
About this paper
Cite this paper
Ioannou, A.D., Malakonakis, P., Georgopoulos, K., Papaefstathiou, I., Dollas, A., Mavroidis, I. (2019). Optimized FPGA Implementation of a Compute-Intensive Oil Reservoir Simulation Algorithm. In: Pnevmatikatos, D., Pelcat, M., Jung, M. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2019. Lecture Notes in Computer Science(), vol 11733. Springer, Cham. https://doi.org/10.1007/978-3-030-27562-4_32
Download citation
DOI: https://doi.org/10.1007/978-3-030-27562-4_32
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-27561-7
Online ISBN: 978-3-030-27562-4
eBook Packages: Computer ScienceComputer Science (R0)