Abstract
Dynamic management of modern Multi-Processors System on Chip (MPSoC) become mandatory for optimization purpose. Evaluation of these managers is essential early in the design process to guarantee a reduced design cycle. However, most of the existing system-level simulation-based frameworks consider static application mapping and do not consider the run-time management effects. In this work, we present a modeling and simulation approach that allows integration of run-time management strategies in MPSoC system simulation. We have integrated the proposed approach in an industrial modeling and simulation framework. A case-study with seven applications running on a heterogeneous multicore platform is considered and different management strategies are evaluated according to latency and power consumption criteria.
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Notes
- 1.
As can be seen in Fig. 2, \(t_{1,2}\) and \(t_{1,3}\) are executed three times for each iteration of App1. \(App_2\) is a 2-task application.
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Yang, S., Le Nours, S., Méndez Real, M., Pillement, S. (2019). System-Level Modeling and Simulation of MPSoC Run-Time Management Using Execution Traces Analysis. In: Pnevmatikatos, D., Pelcat, M., Jung, M. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2019. Lecture Notes in Computer Science(), vol 11733. Springer, Cham. https://doi.org/10.1007/978-3-030-27562-4_20
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