Challenges in Driving New Generations of Power Switches for Motor Drive: A dV/dt Self-Adjusting Architecture for Superjunction Power Devices

Abstract

A dV/dt self-adjusting architecture for driving new generations of power transistors is presented. Superjunction technology provided a real opportunity to significantly improve the overall performance/cost ratio of power conversion. However, due to the fast commutation speed capability of Superjunction devices, its switching characteristics are more susceptible to parasitic elements, such as the non-linear gate-drain capacitance. This element affects the slope, dV/dt, which must be a trade-off between switching loss reduction and electromagnetic interference compatibility specifications. A new driving strategy for hard-switching inverters stages is proposed, in order to make the whole system working in the optimum self-adjusting operating point.