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Design of Fast-Switching Circuit Blocks

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Integrated High-Vin Multi-MHz Converters
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Abstract

This chapter presents the designs of fast-switching circuit blocks to control a buck converter with required minimum on-time pulses as small as 3 ns for input voltages up to 50 V and switching frequencies up to 30 MHz. A PWM generator is shown, which is able to generate on-time pulses smaller than 3 ns. Level shifters are proposed to propagate this minimum on-time pulses with minimum propagation delay to a PMOS high-side switch with static gate driver supply, or an NMOS high-side switch with a switching gate driver supply. The level shifter for NMOS switches offers a high transient immunity at switching slopes up to 80 V/ns in addition. A gate driver design is described which minimizes the propagation delay, and allows a fast turn-on of the power switches with optimized power consumption.

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References

  1. Azais F, Bernard S, Bertrand Y, Michel X, Renovell M (2001) A low-cost adaptive ramp generator for analog BIST applications. In: 19th IEEE proceedings on VLSI test symposium. VTS 2001, pp 266–271. https://doi.org/10.1109/VTS.2001.923449

  2. Basso C (2008) Switch-mode power supplies spice simulations and practical designs, 1st edn. McGraw-Hill, Inc., New York

    Google Scholar 

  3. De Lima J, Pimenta W (2007) A gm-C ramp generator for voltage feedforward control of DC-DC switching regulators. In: 2007 IEEE international symposium on circuits and systems, pp 1919–1922. https://doi.org/10.1109/ISCAS.2007.378350

  4. Fang CC (2012) Closed-form critical conditions of instabilities for constant on-time controlled buck converters. IEEE Trans Circuits Syst I 59(12):3090–3097. https://doi.org/10.1109/TCSI.2012.2206445

    Article  MathSciNet  Google Scholar 

  5. Hamzaoglu F, Stan M (2001) Split-path skewed (SPS) CMOS buffer for high performance and low power applications. IEEE Trans Circuits Syst II 48(10):998–1002. https://doi.org/10.1109/82.974792

    Article  Google Scholar 

  6. Jansson C, Chen K, Svensson C (1994) Linear, polynomial and exponential ramp generators with automatic slope adjustment. IEEE Trans Circuits Syst I 41(2):181–185. https://doi.org/10.1109/81.269058

    Article  Google Scholar 

  7. Ke X, He L, Ma DB (2016) Design of high accuracy high conversion ratio single-stage switching power converter for modern FPGAs at 10MHz. In: 2016 13th IEEE international conference on solid-state and integrated circuit technology (ICSICT), pp 73–76. https://doi.org/10.1109/ICSICT.2016.7998842

  8. Li N, Haviland G, Tuszynski A (1990) CMOS tapered buffer. IEEE J Solid-State Circuits 25(4):1005–1008. https://doi.org/10.1109/4.58293

    Article  Google Scholar 

  9. Liu Z, Lee H (2013) A 100V gate driver with sub-nanosecond-delay capacitive-coupled level shifting and dynamic timing control for ZVS-based synchronous power converters. In: Proceedings of the IEEE 2013 custom integrated circuits conference, pp 1–4. https://doi.org/10.1109/CICC.2013.6658482

  10. Liu Z, Cong L, Lee H (2015) Design of on-chip gate drivers with power-efficient high-speed level shifting and dynamic timing control for high-voltage synchronous switching power converters. IEEE J Solid-State Circuits 50(6):1463–1477. https://doi.org/10.1109/JSSC.2015.2422075

    Article  Google Scholar 

  11. Liu D, Hollis SJ, Dymond HCP, McNeill N, Stark BH (2016) Design of 370-ps delay floating-voltage level shifters with 30-V/ns power supply slew tolerance. IEEE Trans Circuits Syst II 63(7):688–692. https://doi.org/10.1109/TCSII.2016.2530902

    Article  Google Scholar 

  12. Ma H, van der Zee R, Nauta B (2013) An integrated 80-V class-D power output stage with 94% efficiency in a 0.14 μm SOI BCD process. In: 2013 Proceedings of the ESSCIRC (ESSCIRC), pp 89–92. https://doi.org/10.1109/ESSCIRC.2013.6649079

  13. Maderbacher G, Jackum T, Pribyl W, Michaelis S, Michaelis D, Sandner C (2011) Fast and robust level shifters in 65 nm CMOS. In: 2011 Proceedings of the ESSCIRC (ESSCIRC), pp 195–198. https://doi.org/10.1109/ESSCIRC.2011.6044898

  14. Moghe Y, Lehmann T, Piessens T (2011) Nanosecond delay floating high voltage level shifters in a 0.35 μm HV-CMOS technology. IEEE J Solid-State Circuits 46(2):485–497. https://doi.org/10.1109/JSSC.2010.2091322

    Article  Google Scholar 

  15. Takai N, Fujimura Y (2007) Compensation method of amplitude error in sawtooth wave generator. In: 2007 18th European conference on circuit theory and design, pp 128–131. https://doi.org/10.1109/ECCTD.2007.4529553

  16. Takai N, Fujimura Y (2008) Sawtooth generator using two triangular waves. In: 2008 51st Midwest symposium on circuits and systems, pp 706–709. https://doi.org/10.1109/MWSCAS.2008.4616897

  17. Wittmann J, Wicht B (2013) MHz-converter design for high conversion ratio. In: 2013 25th International symposium on power semiconductor devices & IC’s (ISPSD), pp 127–130. https://doi.org/10.1109/ISPSD.2013.6694445

  18. Wittmann J, Rosahl T, Wicht B (2014) A 50V high-speed level shifter with high dV/dt immunity for multi-MHz DCDC converters. In: European solid state circuits conference (ESSCIRC), ESSCIRC 2014 – 40th, pp 151–154. https://doi.org/10.1109/ESSCIRC.2014.6942044

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Wittmann, J. (2020). Design of Fast-Switching Circuit Blocks. In: Integrated High-Vin Multi-MHz Converters. Springer, Cham. https://doi.org/10.1007/978-3-030-25257-1_4

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  • DOI: https://doi.org/10.1007/978-3-030-25257-1_4

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-25256-4

  • Online ISBN: 978-3-030-25257-1

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