Abstract
This chapter describes multiply clocked sequences and properties and clock flow semantics (how does clock flow from one clock domain to another). It also discusses all the operators that work on multiply clocked properties such as “and,” “or,” “not,” etc. It also describes nuances of Legal and Illegal conditions of such properties and sequences.
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Mehta, A.B. (2020). Multiple Clocks. In: System Verilog Assertions and Functional Coverage. Springer, Cham. https://doi.org/10.1007/978-3-030-24737-9_10
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DOI: https://doi.org/10.1007/978-3-030-24737-9_10
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Publisher Name: Springer, Cham
Print ISBN: 978-3-030-24736-2
Online ISBN: 978-3-030-24737-9
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