Abstract
We present a reversible, in-place carry-lookahead adder that uses fewer ancillae than previous designs. Specifically, an N-bit adder uses only roughly N ancillae, where previous designs have used roughly 2N ancillae. The cost is 20% higher gate count and 50% higher gate delay.
This work was partially supported by the European COST Action IC 1405: Reversible Computation - Extending Horizons of Computing.
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Mogensen, T.Æ. (2019). Reversible In-Place Carry-Lookahead Addition with Few Ancillae. In: Thomsen, M., Soeken, M. (eds) Reversible Computation. RC 2019. Lecture Notes in Computer Science(), vol 11497. Springer, Cham. https://doi.org/10.1007/978-3-030-21500-2_14
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DOI: https://doi.org/10.1007/978-3-030-21500-2_14
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