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Design of Low Power Integrated Radios for Emerging Standards pp 41–56Cite as

Dual-Path Noise Cancelling LNA

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Part of the book series: Analog Circuits and Signal Processing ((ACSP))

Abstract

In this chapter we present a 0.7 V low power LNA which combines a 1:3 frontend balun with dual-path noise and nonlinearity cancellation for improved noise performance at low powers. In traditional noise cancellation techniques only the noise of the main path is cancelled while the noise of the auxiliary path is reduced by using higher power. In the proposed design, the noise and nonlinearity of both the main and the auxiliary paths are mutually cancelled allowing for low power operation. The 2.8 dB NF, − 10.7 dBm IIP3 LNA in TSMC’s 65 nm GP process consumes 475 μW of power resulting in an FOM of 28.8 dB which is 8.2 dB better than the state of the art.

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Authors and Affiliations

  1. Intel Labs, Hillsboro, OR, USA

    Mustafijur Rahman

  2. Department of Electrical & Computer Engineering, University of Minnesota, Minneapolis, MN, USA

    Ramesh Harjani

Authors
  1. Mustafijur Rahman
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  2. Ramesh Harjani
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Rahman, M., Harjani, R. (2020). Dual-Path Noise Cancelling LNA. In: Design of Low Power Integrated Radios for Emerging Standards. Analog Circuits and Signal Processing. Springer, Cham. https://doi.org/10.1007/978-3-030-21333-6_4

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  • DOI: https://doi.org/10.1007/978-3-030-21333-6_4

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-21332-9

  • Online ISBN: 978-3-030-21333-6

  • eBook Packages: EngineeringEngineering (R0)

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