ERRIC Reliability

  • Igor SchagaevEmail author
  • Eugene Zouev
  • Kaegi Thomas


The key property of our design is resilience. So far we mostly covered system software methods and schemes to achieve or support it. Previous Chaps.  14 and  15 explained briefly what hardware (processor) should possess (including reduction on functions and limited in architecture options) to be able to implement resilience in the most efficient way. Here, we intend to analyze what we have achieved in hardware design in terms of malfunction tolerance—attempting to use heavy artillery of system software as less as possible, making dirty work of fault detection and determination (malfunction or permanent for hardware).


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Copyright information

© Springer Nature Switzerland AG 2020

Authors and Affiliations

  1. 1.IT-ACS LtdStevenageUK
  2. 2.Department of InformaticsTechnopolisInnopolis, KazanRussia

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