Abstract
The world of integrated has seen vast advancement and most of the semiconductor industries were focusing on analog and mixed signals circuits as it is cost effective solutions on a single chip i.e., system on chip (SoC). This advancement provides analog, digital, and essential mixed signal circuits are integrated on a semiconductor device, which is used to build any modern consumer electronic applications including smart devices. In order to verify or test the mixed signals traditional techniques are not encouraging because of cost, performance and production time. The formal verification is technique which provides the evident of conscious algorithms in a system with respect to formal methods. The demand of formal verification in system on chip (SoC) designs in context of both software and hardware is high because of its cost and accuracy. In this paper, the design of formal verification of mixed signals using Feed Forward Neural Network (FFNN) is analyzed. The design includes mixed signal module, FFNN implemented design, and formal verification for analyze the accuracy of the trained network. The training of FFNN network is performed by using Verilog HDL over Xilinx platform on low cost Artix-7 FPGA. From outcomes it is found that formal verification achieves 94.00% of accuracy with less processing time.
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Vidhya, D.S., Ramachandra, M. (2019). An Efficient Approach Towards Formal Verification of Mixed Signals Using Feed-Forward Neural Network. In: Silhavy, R. (eds) Cybernetics and Automation Control Theory Methods in Intelligent Algorithms. CSOC 2019. Advances in Intelligent Systems and Computing, vol 986. Springer, Cham. https://doi.org/10.1007/978-3-030-19813-8_4
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DOI: https://doi.org/10.1007/978-3-030-19813-8_4
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