Abstract
An implantation scheme which enhances the readout speed of a silicon pinned photodiode (PPD) with large pixel length is presented. A special type of pinned photodiode which was developed by the Fraunhofer IMS in Duisburg, Germany for Time-of-Flight distance measurement applications is taken as the starting point. The sensor which was fabricated in a standard 0.35 \(\upmu \text {m}\) CMOS process and the optimized design introduces a second gate, the Collection Gate (CG), to the pinned photodiode which will be analysed. Based on this PPD, a second well implantation is described which improves the electron transfer. Furthermore, the influence of the Collection Gate on the electron transfer is described. The CG can alter the conduction band energy of the PPD. It is shown that the barrier at the interface between well and GC can be reduces by applying a voltage to the CG. The second implantation in combination with the CG creates a designated electron path which introduces the possibility to enlarge the PPD without affecting the performance of the sensor.
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Girgenrath, L., Hofmann, M., Kühnhold, R., Vogt, H. (2019). Characterization of the Charge Transfer in an Enhanced Pinned Photodiode with a Collection Gate. In: Ribeiro, P., Andrews, D., Raposo, M. (eds) Optics, Photonics and Laser Technology 2017. Springer Series in Optical Sciences, vol 222. Springer, Cham. https://doi.org/10.1007/978-3-030-12692-6_9
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DOI: https://doi.org/10.1007/978-3-030-12692-6_9
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