Abstract
In this chapter, we describe a fast statistical yield analysis methodology for memory design. At the heart of its engine is a mixture importance sampling-based methodology which comprises a uniform sampling stage and an importance sampling stage. Logistic regression-based machine learning techniques are employed for modeling the circuit response and speeding up the importance sample points simulations. To avoid overfitting, we rely on a cross-validation-based regularization framework for ordered feature selection. The methodology is comprehensive and computationally efficient. We demonstrate the methodology on an industrial state-of-the-art 14 nm FinFET SRAM design with write-assist circuitry. The results corroborate well with hardware and with the fully circuit-simulation-based approach.
A model is a simplification or approximation of reality and hence will not reflect all of reality Kenneth P. Burnham David R. Anderson
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The authors would like to thank the Maroun Semaan Faculty of Engineering and Architecture at the American University of Beirut for supporting Ph.D. student Miss Lama Shaer.
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Kanj, R., Joshi, R.V., Shaer, L., Chehab, A., Malik, M. (2019). Fast Statistical Analysis Using Machine Learning. In: Elfadel, I., Boning, D., Li, X. (eds) Machine Learning in VLSI Computer-Aided Design. Springer, Cham. https://doi.org/10.1007/978-3-030-04666-8_11
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