Extreme Statistics in Memories

  • Amith SingheeEmail author


Memory design specifications typically include yield requirements, apart from performance and power requirements. These yield requirements are usually specified for the entire memory array at some supply voltage and temperature conditions. For example, the designer may be comfortable with an array failure probability of one in a thousand at 100C and 1 V supply, i.e., Ff,array ≤ 10−3. However, how does this translate to a yield requirement for the memory cell? How do we even estimate the statistical distribution of memory cell performance metrics in this extreme rare event regime? We will answer these questions and in the process see the application of certain machine learning techniques and extreme value theory in memory design.



This work was supported by the MARCO/DARPA Focus Research Center for Circuit and System Solutions (C2S2) and the Semiconductor Research Corporation.


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Copyright information

© Springer Nature Switzerland AG 2019

Authors and Affiliations

  1. 1.IBM ResearchBangaloreIndia

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