Architecture Proposal for the Processing of Control Algorithms Applied in Microgrids

Abstract

This paper presents a novel architecture, based in a system on chip and in a system on a programmable chip, for the processing of control algorithms in inverters. The architecture is based in a Wireless Sensor Network with a Digital Signal Controller, DSC, and a Field Programmable Gate Array, FPGA, from Artix-7 Xilinx family for implementing a sensor node for controlling and monitoring an electrical microgrid. The control algorithms work with sampling frequencies greater than or equal to 44 kHz and 12 bits per sample. The control algorithms have an Infinite Impulse Response, IIR, difference equation with 32 bits coefficients. To work efficiently with these sampling frequencies and coefficients, the FPGA is used to implement two dedicated architectures that allow the execution of control algorithms. One architecture implements a dedicated core for the computation of the IIR control algorithm. Another architecture implements the Serial Peripheral Interface, SPI, for stablishing a dedicated communication between the DSC and the FPGA. The DSC is used to digitize a sinusoidal signal, set the sampling frequency and send the samples to the FPGA using the SPI. It also performs communication with a PC through the UART interface. In addition, it performs wireless communication with data servers. The experimental results demonstrate that the clock frequency reached for the communication architecture in the FPGA is 518.672 MHz. Therefore, the proposed architecture can perform the samples transfer in real-time from DSC to FPGA.