Abstract
High-level power models have been investigated by researchers in academia and by industry. The works can be divided into two groups: those with a strong connection to register transfer level code and true electronic system level approaches. The latter group can be subdivided into three topics. First, the internal structure of the power models is different. Some power models are based on a state machine with a fixed power consumption value attributed to each state. Other power models are basically a linear equation in which coefficients are multiplied with input parameters. The coefficients are fixed power or energy values and the inputs are, for example, event counts from a timed functional simulation. Some power models go beyond this approach and use higher order terms or multiple linear formulas. The second topic is about the connection of power models to existing simulations. There are several frameworks that support this, both from academia and from industry. Third, the actual creation of power models as well as their application and evaluation for certain specific components is covered in many papers. The majority handles programmable application processors by using different modeling strategies. Some others focus on power estimation for networks on chip. However, also the power consumption of peripherals, buses, memories, and even software libraries has been modeled on high level.
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Schuermans, S., Leupers, R. (2019). Related Work. In: Power Estimation on Electronic System Level using Linear Power Models. Springer, Cham. https://doi.org/10.1007/978-3-030-01875-7_2
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